Lines Matching refs:CMU
339 uint32_t calCtrl = CMU->CALCTRL in CMU_CalibrateConfig()
354 CMU->CALTOP = downCycles << _CMU_CALTOP_CALTOP_SHIFT; in CMU_CalibrateConfig()
455 CMU->CALCTRL = calCtrl; in CMU_CalibrateConfig()
476 if ((CMU->CALCTRL & CMU_CALCTRL_CONT) == 0UL) { in CMU_CalibrateCountGet()
478 while ((CMU->STATUS & CMU_STATUS_CALRDY) == 0UL) { in CMU_CalibrateCountGet()
481 return CMU->CALCNT; in CMU_CalibrateCountGet()
592 CMU->EXPORTCLKCTRL = (CMU->EXPORTCLKCTRL & ~mask) | tmp; in CMU_ClkOutPinConfig()
632 ret = (CMU->SYSCLKCTRL & _CMU_SYSCLKCTRL_HCLKPRESC_MASK) in CMU_ClockDivGet()
652 ret = (CMU->TRACECLKCTRL & _CMU_TRACECLKCTRL_PRESC_MASK) in CMU_ClockDivGet()
667 ret = (CMU->EXPORTCLKCTRL & _CMU_EXPORTCLKCTRL_PRESC_MASK) in CMU_ClockDivGet()
672 ret = (CMU->SYSCLKCTRL & _CMU_SYSCLKCTRL_PCLKPRESC_MASK) in CMU_ClockDivGet()
725 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_HCLKPRESC_MASK) in CMU_ClockDivSet()
758 CMU->TRACECLKCTRL = (CMU->TRACECLKCTRL & ~_CMU_TRACECLKCTRL_PRESC_MASK) in CMU_ClockDivSet()
775 CMU->EXPORTCLKCTRL = (CMU->EXPORTCLKCTRL & ~_CMU_EXPORTCLKCTRL_PRESC_MASK) in CMU_ClockDivSet()
781 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_PCLKPRESC_MASK) in CMU_ClockDivSet()
817 reg = &CMU->CLKEN0; in CMU_ClockEnable()
819 reg = &CMU->CLKEN1; in CMU_ClockEnable()
822 reg = &CMU->CLKEN2; in CMU_ClockEnable()
826 reg = &CMU->CRYPTOACCCLKCTRL; in CMU_ClockEnable()
1198 switch (CMU->SYSCLKCTRL & _CMU_SYSCLKCTRL_CLKSEL_MASK) { in CMU_ClockSelectGet()
1470 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in sli_em_cmu_HFXOSetForceEnable()
1486 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in sli_em_cmu_SYSTICEXTCLKENSet()
1487 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in sli_em_cmu_SYSTICEXTCLKENSet()
1494 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in sli_em_cmu_SYSTICEXTCLKENSet()
1510 bool syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in sli_em_cmu_SYSTICEXTCLKENClear()
1511 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in sli_em_cmu_SYSTICEXTCLKENClear()
1518 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in sli_em_cmu_SYSTICEXTCLKENClear()
1562 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_ClockSelectSet()
1604 CMU->SYSCLKCTRL = (CMU->SYSCLKCTRL & ~_CMU_SYSCLKCTRL_CLKSEL_MASK) | tmp; in CMU_ClockSelectSet()
1661 CMU->IADCCLKCTRL = (CMU->IADCCLKCTRL & ~_CMU_IADCCLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
1724 CMU->EM01GRPACLKCTRL = (CMU->EM01GRPACLKCTRL in CMU_ClockSelectSet()
1738 syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CMU_ClockSelectSet()
1739 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in CMU_ClockSelectSet()
1742 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in CMU_ClockSelectSet()
1751 syscfgClkIsOff = ((CMU->CLKEN0 & CMU_CLKEN0_SYSCFG) == 0); in CMU_ClockSelectSet()
1752 CMU->CLKEN0_SET = CMU_CLKEN0_SYSCFG; in CMU_ClockSelectSet()
1755 CMU->CLKEN0_CLR = CMU_CLKEN0_SYSCFG; in CMU_ClockSelectSet()
1796 CMU->EM23GRPACLKCTRL = (CMU->EM23GRPACLKCTRL in CMU_ClockSelectSet()
1830 CMU->EM4GRPACLKCTRL = (CMU->EM4GRPACLKCTRL in CMU_ClockSelectSet()
1871 CMU->EM01GRPBCLKCTRL = (CMU->EM01GRPBCLKCTRL in CMU_ClockSelectSet()
1907 CMU->WDOG0CLKCTRL = (CMU->WDOG0CLKCTRL & ~_CMU_WDOG0CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
1943 CMU->WDOG1CLKCTRL = (CMU->WDOG1CLKCTRL & ~_CMU_WDOG1CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
1971 CMU->DPLLREFCLKCTRL = (CMU->DPLLREFCLKCTRL in CMU_ClockSelectSet()
2020 CMU->TRACECLKCTRL = (CMU->TRACECLKCTRL & ~_CMU_TRACECLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2056 CMU->EUART0CLKCTRL = (CMU->EUART0CLKCTRL & ~_CMU_EUART0CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2112 CMU->EUSART0CLKCTRL = (CMU->EUSART0CLKCTRL & ~_CMU_EUSART0CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2161 CMU->EM01GRPCCLKCTRL = (CMU->EM01GRPCCLKCTRL & ~_CMU_EM01GRPCCLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2191 CMU->RTCCCLKCTRL = (CMU->RTCCCLKCTRL & ~_CMU_RTCCCLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2223 CMU->SYSRTC0CLKCTRL = (CMU->SYSRTC0CLKCTRL & ~_CMU_SYSRTC0CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2251 CMU->LCDCLKCTRL = (CMU->LCDCLKCTRL & ~_CMU_LCDCLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2277 CMU->VDAC0CLKCTRL = (CMU->VDAC0CLKCTRL & ~_CMU_VDAC0CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2301 CMU->VDAC1CLKCTRL = (CMU->VDAC1CLKCTRL & ~_CMU_VDAC1CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2323 CMU->PCNT0CLKCTRL = (CMU->PCNT0CLKCTRL & ~_CMU_PCNT0CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2342 CMU->LESENSEHFCLKCTRL = (CMU->LESENSEHFCLKCTRL & ~_CMU_LESENSEHFCLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2364 CMU->USB0CLKCTRL = (CMU->USB0CLKCTRL & ~_CMU_USB0CLKCTRL_CLKSEL_MASK) in CMU_ClockSelectSet()
2409 CMU->CLKEN0_SET = CMU_CLKEN0_LFRCO; in CMU_LF_ClockPrecisionGet()
2504 CMU->CLKEN0_SET = CMU_CLKEN0_DPLL0 | CMU_CLKEN0_HFRCO0; in CMU_HFRCODPLLBandSet()
2642 CMU->CLKEN0_SET = CMU_CLKEN0_DPLL0 | CMU_CLKEN0_HFRCO0; in CMU_DPLLLock()
2826 CMU->CLKEN1_SET = CMU_CLKEN1_USB; in CMU_USBPLLInit()
2883 CMU->CLKEN1_SET = CMU_CLKEN1_RFFPLL0; in CMU_RFFPLLInit()
2962 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_HFXOInit()
3521 CMU->CLKEN0_SET = CMU_CLKEN0_LFXO; in CMU_LFXOInit()
3628 CMU->CLKEN0_SET = CMU_CLKEN0_LFRCO; in CMU_LFRCOSetPrecision()
3680 CMU->CLKEN0_SET = CMU_CLKEN0_LFRCO; in CMU_OscillatorTuningGet()
3688 CMU->CLKEN0_SET = CMU_CLKEN0_HFRCO0; in CMU_OscillatorTuningGet()
3701 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_OscillatorTuningGet()
3708 CMU->CLKEN0_SET = CMU_CLKEN0_LFXO; in CMU_OscillatorTuningGet()
3747 CMU->CLKEN0_SET = CMU_CLKEN0_LFRCO; in CMU_OscillatorTuningSet()
3761 CMU->CLKEN0_SET = CMU_CLKEN0_HFRCO0; in CMU_OscillatorTuningSet()
3784 CMU->CLKEN0_SET = CMU_CLKEN0_HFXO0; in CMU_OscillatorTuningSet()
3812 CMU->CLKEN0_SET = CMU_CLKEN0_LFXO; in CMU_OscillatorTuningSet()
3887 CMU->PCNT0CLKCTRL = CMU_PCNT0CLKCTRL_CLKSEL_PCNTS0; in CMU_PCNTClockExternalSet()
3889 CMU->PCNT0CLKCTRL = CMU_PCNT0CLKCTRL_CLKSEL_EM23GRPACLK; in CMU_PCNTClockExternalSet()
3925 CMU->CLKEN0_SET = CMU_CLKEN0_HFRCOEM23; in CMU_HFRCOEM23BandSet()
3971 switch (CMU->EM01GRPBCLKCTRL & _CMU_EM01GRPBCLKCTRL_CLKSEL_MASK) { in em01GrpbClkGet()
4034 switch (CMU->EUART0CLKCTRL & _CMU_EUART0CLKCTRL_CLKSEL_MASK) { in euart0ClkGet()
4073 switch (CMU->EUSART0CLKCTRL & _CMU_EUSART0CLKCTRL_CLKSEL_MASK) { in eusart0ClkGet()
4159 switch (CMU->EM01GRPCCLKCTRL & _CMU_EM01GRPCCLKCTRL_CLKSEL_MASK) { in em01GrpcClkGet()
4226 switch (CMU->LCDCLKCTRL & _CMU_LCDCLKCTRL_CLKSEL_MASK) { in lcdClkGet()
4273 switch (CMU->VDAC0CLKCTRL & _CMU_VDAC0CLKCTRL_CLKSEL_MASK) { in vdac0ClkGet()
4324 switch (CMU->VDAC1CLKCTRL & _CMU_VDAC1CLKCTRL_CLKSEL_MASK) { in vdac1ClkGet()
4377 switch (CMU->PCNT0CLKCTRL & _CMU_PCNT0CLKCTRL_CLKSEL_MASK) { in pcnt0ClkGet()
4419 switch (CMU->LESENSEHFCLKCTRL & _CMU_LESENSEHFCLKCTRL_CLKSEL_MASK) { in lesenseHFClkGet()
4453 CMU->SYSCLKCTRL_SET = CMU_SYSCLKCTRL_RHCLKPRESC; in rhclkPrescMax()
4465 CMU->SYSCLKCTRL_CLR = CMU_SYSCLKCTRL_RHCLKPRESC; in rhclkPrescOptimize()
4545 switch (CMU->TRACECLKCTRL & _CMU_TRACECLKCTRL_CLKSEL_MASK) { in traceClkGet()
4607 switch (CMU->DPLLREFCLKCTRL & _CMU_DPLLREFCLKCTRL_CLKSEL_MASK) { in dpllRefClkGet()
4657 switch (CMU->EM01GRPACLKCTRL & _CMU_EM01GRPACLKCTRL_CLKSEL_MASK) { in em01GrpaClkGet()
4728 switch (CMU->EM23GRPACLKCTRL & _CMU_EM23GRPACLKCTRL_CLKSEL_MASK) { in em23GrpaClkGet()
4778 switch (CMU->EM4GRPACLKCTRL & _CMU_EM4GRPACLKCTRL_CLKSEL_MASK) { in em4GrpaClkGet()
4890 CMU->CLKEN1_SET = CMU_CLKEN1_MSC; in flashWaitStateControl()
5021 switch (CMU->IADCCLKCTRL & _CMU_IADCCLKCTRL_CLKSEL_MASK) { in iadcClkGet()
5096 switch (CMU->RTCCCLKCTRL & _CMU_RTCCCLKCTRL_CLKSEL_MASK) { in rtccClkGet()
5144 switch (CMU->SYSRTC0CLKCTRL & _CMU_SYSRTC0CLKCTRL_CLKSEL_MASK) { in sysrtcClkGet()
5204 switch (CMU->WDOG0CLKCTRL & _CMU_WDOG0CLKCTRL_CLKSEL_MASK) { in wdog0ClkGet()
5260 switch (CMU->WDOG1CLKCTRL & _CMU_WDOG1CLKCTRL_CLKSEL_MASK) { in wdog1ClkGet()
5347 switch (CMU->USB0CLKCTRL & _CMU_USB0CLKCTRL_CLKSEL_MASK) { in usbClkGet()
5669 #define GENERIC_HFLE_PRESC_REG CMU->HFCORECLKDIV
5675 #define GENERIC_HFLE_PRESC_REG CMU->HFPRESC
5713 BUS_RegBitWrite(&CMU->CTRL, _GENERIC_HFLE_WS_SHIFT, hfleWs); in setHfLeConfig()
5728 uint32_t ws = BUS_RegBitRead(&CMU->CTRL, _GENERIC_HFLE_WS_SHIFT); in getHfLeConfig()
5751 switch (CMU->AUXHFRCOCTRL & _CMU_AUXHFRCOCTRL_BAND_MASK) { in auxClkGet()
5815 return ret * (1U + ((CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in hfSrcClkGet()
6363 return (CMU->HFXOCTRL & _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) in getHfxoTuningMode()
6366 return (CMU->HFXOCTRL & _CMU_HFXOCTRL_PEAKDETMODE_MASK) in getHfxoTuningMode()
6382 CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) in setHfxoTuningMode()
6385 CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETMODE_MASK) in setHfxoTuningMode()
6429 sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFA_MASK) >> _CMU_LFCLKSEL_LFA_SHIFT; in lfClkGet()
6431 sel = (CMU->LFACLKSEL & _CMU_LFACLKSEL_LFA_MASK) >> _CMU_LFACLKSEL_LFA_SHIFT; in lfClkGet()
6439 sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFB_MASK) >> _CMU_LFCLKSEL_LFB_SHIFT; in lfClkGet()
6441 sel = (CMU->LFBCLKSEL & _CMU_LFBCLKSEL_LFB_MASK) >> _CMU_LFBCLKSEL_LFB_SHIFT; in lfClkGet()
6450 sel = (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFC_MASK) >> _CMU_LFCLKSEL_LFC_SHIFT; in lfClkGet()
6452 sel = (CMU->LFCCLKSEL & _CMU_LFCCLKSEL_LFC_MASK) >> _CMU_LFCCLKSEL_LFC_SHIFT; in lfClkGet()
6461 sel = (CMU->LFECLKSEL & _CMU_LFECLKSEL_LFE_MASK) >> _CMU_LFECLKSEL_LFE_SHIFT; in lfClkGet()
6498 if (CMU->LFCLKSEL >> (lfClkBranch == cmuClock_LFA in lfClkGet()
6537 / SL_Log2ToDiv(((CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) in lfClkGet()
6568 if ((CMU->FREEZE & CMU_FREEZE_REGFREEZE) != 0UL) { in syncReg()
6574 while ((CMU->SYNCBUSY & mask) != 0UL) { in syncReg()
6699 return (CMU_AUXHFRCOBand_TypeDef)((CMU->AUXHFRCOCTRL in CMU_AUXHFRCOBandGet()
6758 CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL in CMU_AUXHFRCOBandSet()
6855 while (BUS_RegBitRead(&CMU->SYNCBUSY, in CMU_AUXHFRCOBandSet()
6879 CMU->AUXHFRCOCTRL = freqCal; in CMU_AUXHFRCOBandSet()
6912 CMU->CALCTRL = CMU_CALCTRL_UPSEL_LFXO; in CMU_Calibrate()
6916 CMU->CALCTRL = CMU_CALCTRL_UPSEL_LFRCO; in CMU_Calibrate()
6921 CMU->CALCTRL = CMU_CALCTRL_UPSEL_PLFRCO; in CMU_Calibrate()
6926 CMU->CALCTRL = CMU_CALCTRL_UPSEL_HFXO; in CMU_Calibrate()
6930 CMU->CALCTRL = CMU_CALCTRL_UPSEL_HFRCO; in CMU_Calibrate()
6934 CMU->CALCTRL = CMU_CALCTRL_UPSEL_AUXHFRCO; in CMU_Calibrate()
6939 CMU->CALCTRL = CMU_CALCTRL_UPSEL_USHFRCO; in CMU_Calibrate()
6949 CMU->CALCNT = HFCycles; in CMU_Calibrate()
6952 CMU->CMD = CMU_CMD_CALSTART; in CMU_Calibrate()
6956 while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALRDY_SHIFT) == 0UL) { in CMU_Calibrate()
6960 while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT) != 0UL) { in CMU_Calibrate()
6964 return CMU->CALCNT; in CMU_Calibrate()
6998 uint32_t calCtrl = CMU->CALCTRL in CMU_CalibrateConfig()
7044 CMU->CALCNT = downCycles; in CMU_CalibrateConfig()
7085 CMU->CALCTRL = calCtrl; in CMU_CalibrateConfig()
7107 if (BUS_RegBitRead(&CMU->CALCTRL, _CMU_CALCTRL_CONT_SHIFT) == 0UL) { in CMU_CalibrateCountGet()
7110 while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALRDY_SHIFT) == 0UL) { in CMU_CalibrateCountGet()
7114 while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT) != 0UL) { in CMU_CalibrateCountGet()
7119 while (BUS_RegBitRead(&CMU->STATUS, _CMU_STATUS_CALBSY_SHIFT) != 0UL) { in CMU_CalibrateCountGet()
7122 return CMU->CALCNT; in CMU_CalibrateCountGet()
7152 ret = 1 + ((CMU->CTRL & _CMU_CTRL_HFCLKDIV_MASK) in CMU_ClockDivGet()
7158 ret = (CMU_ClkDiv_TypeDef)((CMU->HFPERCLKDIV in CMU_ClockDivGet()
7165 ret = (CMU_ClkDiv_TypeDef)((CMU->HFCORECLKDIV in CMU_ClockDivGet()
7173 ret = (CMU_ClkDiv_TypeDef)((CMU->HFCORECLKDIV in CMU_ClockDivGet()
7183 ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) in CMU_ClockDivGet()
7190 ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) in CMU_ClockDivGet()
7198 ret = (CMU_ClkDiv_TypeDef)(((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) in CMU_ClockDivGet()
7207 ret = (CMU_ClkDiv_TypeDef)((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) in CMU_ClockDivGet()
7224 ret = (CMU_ClkDiv_TypeDef)((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) in CMU_ClockDivGet()
7232 ret = (CMU_ClkDiv_TypeDef)((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) in CMU_ClockDivGet()
7298 CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFCLKDIV_MASK) in CMU_ClockDivSet()
7314 CMU->HFPERCLKDIV = (CMU->HFPERCLKDIV & ~_CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) in CMU_ClockDivSet()
7326 CMU->HFCORECLKDIV = (CMU->HFCORECLKDIV in CMU_ClockDivSet()
7345 CMU->HFCORECLKDIV = (CMU->HFCORECLKDIV in CMU_ClockDivSet()
7371 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTC_MASK) in CMU_ClockDivSet()
7385 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LETIMER0_MASK) in CMU_ClockDivSet()
7400 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LCD_MASK) in CMU_ClockDivSet()
7416 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LESENSE_MASK) in CMU_ClockDivSet()
7439 CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART0_MASK) in CMU_ClockDivSet()
7454 CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART1_MASK) in CMU_ClockDivSet()
7512 reg = &CMU->CTRL; in CMU_ClockEnable()
7518 reg = &CMU->HFCORECLKEN0; in CMU_ClockEnable()
7527 reg = &CMU->HFBUSCLKEN0; in CMU_ClockEnable()
7533 reg = &CMU->HFPERCLKDIV; in CMU_ClockEnable()
7538 reg = &CMU->HFPERCLKEN0; in CMU_ClockEnable()
7543 reg = &CMU->HFPERCLKEN1; in CMU_ClockEnable()
7548 reg = &CMU->LFACLKEN0; in CMU_ClockEnable()
7553 reg = &CMU->LFBCLKEN0; in CMU_ClockEnable()
7559 reg = &CMU->LFCCLKEN0; in CMU_ClockEnable()
7566 reg = &CMU->LFECLKEN0; in CMU_ClockEnable()
7573 reg = &CMU->SDIOCTRL; in CMU_ClockEnable()
7580 reg = &CMU->QSPICTRL; in CMU_ClockEnable()
7586 reg = &CMU->USBCTRL; in CMU_ClockEnable()
7591 reg = &CMU->PDMCTRL; in CMU_ClockEnable()
7596 reg = &CMU->PCNTCTRL; in CMU_ClockEnable()
7639 ret >>= (CMU->HFPERCLKDIV & _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) in CMU_ClockFreqGet()
7643 ret /= 1U + ((CMU->HFPERPRESC & _CMU_HFPERPRESC_PRESC_MASK) in CMU_ClockFreqGet()
7652 ret /= 1U + ((CMU->HFPERPRESCB & _CMU_HFPERPRESCB_PRESC_MASK) in CMU_ClockFreqGet()
7661 ret /= 1U + ((CMU->HFPERPRESCC & _CMU_HFPERPRESCC_PRESC_MASK) in CMU_ClockFreqGet()
7675 ret /= 1U + ((CMU->HFBUSPRESC & _CMU_HFBUSPRESC_MASK) in CMU_ClockFreqGet()
7683 ret /= 1U + ((CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in CMU_ClockFreqGet()
7689 ret /= 1U + ((CMU->HFEXPPRESC & _CMU_HFEXPPRESC_PRESC_MASK) in CMU_ClockFreqGet()
7713 ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) in CMU_ClockFreqGet()
7721 ret >>= (CMU->LFEPRESC0 & _CMU_LFEPRESC0_RTCC_MASK) in CMU_ClockFreqGet()
7730 ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) in CMU_ClockFreqGet()
7733 ret /= SL_Log2ToDiv((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) in CMU_ClockFreqGet()
7743 ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER1_MASK) in CMU_ClockFreqGet()
7746 ret /= SL_Log2ToDiv((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER1_MASK) in CMU_ClockFreqGet()
7756 ret >>= ((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) in CMU_ClockFreqGet()
7760 ret /= SL_Log2ToDiv((CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) in CMU_ClockFreqGet()
7768 ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) in CMU_ClockFreqGet()
7770 ret /= 1U + ((CMU->LCDCTRL & _CMU_LCDCTRL_FDIV_MASK) in CMU_ClockFreqGet()
7779 ret >>= (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) in CMU_ClockFreqGet()
7792 ret >>= (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) in CMU_ClockFreqGet()
7795 ret /= SL_Log2ToDiv((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) in CMU_ClockFreqGet()
7805 ret >>= (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) in CMU_ClockFreqGet()
7808 ret /= SL_Log2ToDiv((CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) in CMU_ClockFreqGet()
7817 ret /= SL_Log2ToDiv(((CMU->LFBPRESC0 & _CMU_LFBPRESC0_CSEN_MASK) in CMU_ClockFreqGet()
7852 ret /= 1U + ((CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKDIV_MASK) in CMU_ClockFreqGet()
7862 ret /= 1U + ((CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKDIV_MASK) in CMU_ClockFreqGet()
7934 ret = (CMU->HFPRESC & _CMU_HFPRESC_PRESC_MASK) in CMU_ClockPrescGet()
7939 ret = (CMU->HFEXPPRESC & _CMU_HFEXPPRESC_PRESC_MASK) in CMU_ClockPrescGet()
7944 ret = (CMU->HFPRESC & _CMU_HFPRESC_HFCLKLEPRESC_MASK) in CMU_ClockPrescGet()
7950 ret = (CMU->HFPERPRESC & _CMU_HFPERPRESC_PRESC_MASK) in CMU_ClockPrescGet()
7956 ret = (CMU->HFPERPRESCB & _CMU_HFPERPRESCB_PRESC_MASK) in CMU_ClockPrescGet()
7963 ret = (CMU->HFPERPRESCC & _CMU_HFPERPRESCC_PRESC_MASK) in CMU_ClockPrescGet()
7969 ret = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) in CMU_ClockPrescGet()
7977 ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER0_MASK) in CMU_ClockPrescGet()
7986 ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LESENSE_MASK) in CMU_ClockPrescGet()
7995 ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LETIMER1_MASK) in CMU_ClockPrescGet()
8004 ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_LCD_MASK) in CMU_ClockPrescGet()
8012 ret = (CMU->LFAPRESC0 & _CMU_LFAPRESC0_RTC_MASK) in CMU_ClockPrescGet()
8029 ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART0_MASK) in CMU_ClockPrescGet()
8038 ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_LEUART1_MASK) in CMU_ClockPrescGet()
8047 ret = (CMU->LFBPRESC0 & _CMU_LFBPRESC0_CSEN_MASK) in CMU_ClockPrescGet()
8065 ret = (CMU->LFEPRESC0 & _CMU_LFEPRESC0_RTCC_MASK) in CMU_ClockPrescGet()
8083 ret = (CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKDIV_MASK) in CMU_ClockPrescGet()
8089 ret = (CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKDIV_MASK) in CMU_ClockPrescGet()
8102 ret = (CMU->HFBUSPRESC & _CMU_HFBUSPRESC_MASK) in CMU_ClockPrescGet()
8157 CMU->HFPRESC = (CMU->HFPRESC & ~_CMU_HFPRESC_PRESC_MASK) in CMU_ClockPrescSet()
8173 CMU->HFEXPPRESC = (CMU->HFEXPPRESC & ~_CMU_HFEXPPRESC_PRESC_MASK) in CMU_ClockPrescSet()
8179 CMU->HFPRESC = (CMU->HFPRESC & ~_CMU_HFPRESC_HFCLKLEPRESC_MASK) in CMU_ClockPrescSet()
8185 CMU->HFPERPRESC = (CMU->HFPERPRESC & ~_CMU_HFPERPRESC_PRESC_MASK) in CMU_ClockPrescSet()
8192 CMU->HFPERPRESCB = (CMU->HFPERPRESCB & ~_CMU_HFPERPRESCB_PRESC_MASK) in CMU_ClockPrescSet()
8200 CMU->HFPERPRESCC = (CMU->HFPERPRESCC & ~_CMU_HFPERPRESCC_PRESC_MASK) in CMU_ClockPrescSet()
8211 CMU->HFCOREPRESC = (CMU->HFCOREPRESC & ~_CMU_HFCOREPRESC_PRESC_MASK) in CMU_ClockPrescSet()
8232 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTC_MASK) in CMU_ClockPrescSet()
8251 CMU->LFEPRESC0 = (CMU->LFEPRESC0 & ~_CMU_LFEPRESC0_RTCC_MASK) in CMU_ClockPrescSet()
8262 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_RTCC_MASK) in CMU_ClockPrescSet()
8278 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LETIMER0_MASK) in CMU_ClockPrescSet()
8293 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LETIMER1_MASK) in CMU_ClockPrescSet()
8308 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LESENSE_MASK) in CMU_ClockPrescSet()
8324 CMU->LFAPRESC0 = (CMU->LFAPRESC0 & ~_CMU_LFAPRESC0_LCD_MASK) in CMU_ClockPrescSet()
8347 CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART0_MASK) in CMU_ClockPrescSet()
8362 CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_LEUART1_MASK) in CMU_ClockPrescSet()
8378 CMU->LFBPRESC0 = (CMU->LFBPRESC0 & ~_CMU_LFBPRESC0_CSEN_MASK) in CMU_ClockPrescSet()
8404 CMU->LFEPRESC0 = (CMU->LFEPRESC0 & ~_CMU_LFEPRESC0_RTCC_MASK) in CMU_ClockPrescSet()
8422 CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC0CLKDIV_MASK) in CMU_ClockPrescSet()
8430 CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC1CLKDIV_MASK) in CMU_ClockPrescSet()
8444 CMU->HFBUSPRESC = (CMU->HFBUSPRESC & ~_CMU_HFBUSPRESC_MASK) in CMU_ClockPrescSet()
8487 switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) { in CMU_ClockSelectGet()
8523 switch (CMU->STATUS in CMU_ClockSelectGet()
8559 switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFA_MASK) { in CMU_ClockSelectGet()
8576 if (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFAE_MASK) { in CMU_ClockSelectGet()
8587 switch (CMU->LFACLKSEL & _CMU_LFACLKSEL_LFA_MASK) { in CMU_ClockSelectGet()
8617 switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFB_MASK) { in CMU_ClockSelectGet()
8640 if (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFBE_MASK) { in CMU_ClockSelectGet()
8651 switch (CMU->LFBCLKSEL & _CMU_LFBCLKSEL_LFB_MASK) { in CMU_ClockSelectGet()
8684 switch (CMU->LFCLKSEL & _CMU_LFCLKSEL_LFC_MASK) { in CMU_ClockSelectGet()
8702 switch (CMU->LFECLKSEL & _CMU_LFECLKSEL_LFE_MASK) { in CMU_ClockSelectGet()
8730 switch (CMU->LFCCLKSEL & _CMU_LFCCLKSEL_LFC_MASK) { in CMU_ClockSelectGet()
8752 switch (CMU->DBGCLKSEL & _CMU_DBGCLKSEL_DBG_MASK) { in CMU_ClockSelectGet()
8767 switch (CMU->CTRL & _CMU_CTRL_DBGCLK_MASK) { in CMU_ClockSelectGet()
8783 switch (CMU->STATUS in CMU_ClockSelectGet()
8821 switch (CMU->ADCCTRL & _CMU_ADCCTRL_ADC0CLKSEL_MASK) { in CMU_ClockSelectGet()
8847 switch (CMU->ADCCTRL & _CMU_ADCCTRL_ADC1CLKSEL_MASK) { in CMU_ClockSelectGet()
8869 switch (CMU->SDIOCTRL & _CMU_SDIOCTRL_SDIOCLKSEL_MASK) { in CMU_ClockSelectGet()
8891 switch (CMU->QSPICTRL & _CMU_QSPICTRL_QSPI0CLKSEL_MASK) { in CMU_ClockSelectGet()
8913 switch (CMU->USBCTRL & _CMU_USBCTRL_USBCLKSEL_MASK) { in CMU_ClockSelectGet()
8943 switch (CMU->PDMCTRL & _CMU_PDMCTRL_PDMCLKSEL_MASK) { in CMU_ClockSelectGet()
9029 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_LFXO; in sli_em_cmu_HFClockSelectLFOsc()
9031 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_LFRCO; in sli_em_cmu_HFClockSelectLFOsc()
9040 CMU->CMD = CMU_CMD_HFCLKSEL_LFXO; in sli_em_cmu_HFClockSelectLFOsc()
9042 CMU->CMD = CMU_CMD_HFCLKSEL_LFRCO; in sli_em_cmu_HFClockSelectLFOsc()
9080 CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) in sli_em_cmu_HFClockSelectHFXO()
9083 CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) in sli_em_cmu_HFClockSelectHFXO()
9105 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFXO; in sli_em_cmu_HFClockSelectHFXO()
9112 CMU->CMD = CMU_CMD_HFCLKSEL_HFXO; in sli_em_cmu_HFClockSelectHFXO()
9178 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCO; in sli_em_cmu_HFClockSelectHFRCO()
9185 CMU->CMD = CMU_CMD_HFCLKSEL_HFRCO; in sli_em_cmu_HFClockSelectHFRCO()
9227 CMU->CMD = CMU_CMD_HFCLKSEL_USHFRCODIV2; in sli_em_cmu_HFClockSelectUSHFRCODIV2()
9259 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCODIV2; in sli_em_cmu_HFClockSelectHFRCODIV2()
9289 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_CLKIN0; in sli_em_cmu_HFClockSelectCLKIN0()
9321 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_USHFRCO; in sli_em_cmu_HFClockSelectUSHFRCO()
9465 CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) in CMU_ClockSelectSet()
9468 CMU->CTRL = (CMU->CTRL & ~_CMU_CTRL_HFXOBUFCUR_MASK) in CMU_ClockSelectSet()
9551 CMU->HFCLKSEL = select; in CMU_ClockSelectSet()
9553 CMU->CMD = select; in CMU_ClockSelectSet()
9585 selReg = &CMU->LFACLKSEL; in CMU_ClockSelectSet()
9593 selReg = (selReg == NULL) ? &CMU->LFCCLKSEL : selReg; in CMU_ClockSelectSet()
9601 selReg = (selReg == NULL) ? &CMU->LFECLKSEL : selReg; in CMU_ClockSelectSet()
9608 selReg = (selReg == NULL) ? &CMU->LFBCLKSEL : selReg; in CMU_ClockSelectSet()
9629 BUS_RegBitWrite(&CMU->HFBUSCLKEN0, _CMU_HFBUSCLKEN0_LE_SHIFT, 1); in CMU_ClockSelectSet()
9679 BUS_RegBitWrite(&CMU->HFCORECLKEN0, _CMU_HFCORECLKEN0_LE_SHIFT, 1); in CMU_ClockSelectSet()
9700 CMU->LFCLKSEL = (CMU->LFCLKSEL in CMU_ClockSelectSet()
9705 CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFA_MASK) in CMU_ClockSelectSet()
9710 CMU->LFCLKSEL = (CMU->LFCLKSEL in CMU_ClockSelectSet()
9715 CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFB_MASK) in CMU_ClockSelectSet()
9747 CMU->LFCLKSEL = (CMU->LFCLKSEL & ~_CMU_LFCLKSEL_LFC_MASK) in CMU_ClockSelectSet()
9759 CMU->DBGCLKSEL = CMU_DBGCLKSEL_DBG_AUXHFRCO; in CMU_ClockSelectSet()
9764 CMU->DBGCLKSEL = CMU_DBGCLKSEL_DBG_HFCLK; in CMU_ClockSelectSet()
9771 CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_DBGCLK_MASK)) in CMU_ClockSelectSet()
9777 CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_DBGCLK_MASK)) in CMU_ClockSelectSet()
9799 CMU->CMD = CMU_CMD_USBCCLKSEL_LFXO; in CMU_ClockSelectSet()
9802 while ((CMU->STATUS & CMU_STATUS_USBCLFXOSEL) == 0) { in CMU_ClockSelectSet()
9812 CMU->CMD = CMU_CMD_USBCCLKSEL_LFRCO; in CMU_ClockSelectSet()
9815 while ((CMU->STATUS & CMU_STATUS_USBCLFRCOSEL) == 0) { in CMU_ClockSelectSet()
9823 CMU->CMD = CMU_CMD_USBCCLKSEL_HFCLKNODIV; in CMU_ClockSelectSet()
9825 while ((CMU->STATUS & CMU_STATUS_USBCHFCLKSEL) == 0) { in CMU_ClockSelectSet()
9837 CMU->CMD = CMU_CMD_USBCCLKSEL_USHFRCO; in CMU_ClockSelectSet()
9840 while ((CMU->STATUS & CMU_STATUS_USBCUSHFRCOSEL) == 0) { in CMU_ClockSelectSet()
9883 CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC0CLKSEL_MASK) in CMU_ClockSelectSet()
9918 CMU->ADCCTRL = (CMU->ADCCTRL & ~_CMU_ADCCTRL_ADC1CLKSEL_MASK) in CMU_ClockSelectSet()
9957 CMU->SDIOCTRL = (CMU->SDIOCTRL & ~_CMU_SDIOCTRL_SDIOCLKSEL_MASK) in CMU_ClockSelectSet()
9996 CMU->QSPICTRL = (CMU->QSPICTRL & ~_CMU_QSPICTRL_QSPI0CLKSEL_MASK) in CMU_ClockSelectSet()
10021 CMU->HFXOCTRL |= CMU_HFXOCTRL_HFXOX2EN; in CMU_ClockSelectSet()
10054 CMU->USBCTRL = (CMU->USBCTRL & ~_CMU_USBCTRL_USBCLKSEL_MASK) in CMU_ClockSelectSet()
10087 CMU->PDMCTRL = (CMU->PDMCTRL & ~_CMU_PDMCTRL_PDMCLKSEL_MASK) in CMU_ClockSelectSet()
10280 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCODIV2; in CMU_DPLLLock()
10283 CMU->OSCENCMD = CMU_OSCENCMD_DPLLDIS; in CMU_DPLLLock()
10284 while ((CMU->STATUS & (CMU_STATUS_DPLLENS | CMU_STATUS_DPLLRDY)) != 0UL) { in CMU_DPLLLock()
10286 CMU->IFC = CMU_IFC_DPLLRDY | CMU_IFC_DPLLLOCKFAILLOW in CMU_DPLLLock()
10288 CMU->DPLLCTRL1 = ((uint32_t)init->n << _CMU_DPLLCTRL1_N_SHIFT) in CMU_DPLLLock()
10290 CMU->HFRCOCTRL = hfrcoCtrlVal; in CMU_DPLLLock()
10291 CMU->DPLLCTRL = ((uint32_t)init->refClk << _CMU_DPLLCTRL_REFSEL_SHIFT) in CMU_DPLLLock()
10296 CMU->OSCENCMD = CMU_OSCENCMD_DPLLEN; in CMU_DPLLLock()
10297 while ((lockStatus = (CMU->IF & (CMU_IF_DPLLRDY in CMU_DPLLLock()
10305 CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCO; in CMU_DPLLLock()
10373 while (CMU->SYNCBUSY != 0UL) { in CMU_FreezeEnable()
10376 CMU->FREEZE = CMU_FREEZE_REGFREEZE; in CMU_FreezeEnable()
10378 CMU->FREEZE = 0; in CMU_FreezeEnable()
10392 return (CMU_HFRCOBand_TypeDef)((CMU->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK) in CMU_HFRCOBandGet()
10463 CMU->HFRCOCTRL = (CMU->HFRCOCTRL in CMU_HFRCOBandSet()
10592 while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_HFRCOBSY_SHIFT) != 0UL) { in CMU_HFRCOBandSet()
10633 CMU->HFRCOCTRL = freqCal; in CMU_HFRCOBandSet()
10675 return (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_SUDELAY_MASK) in CMU_HFRCOStartupDelayGet()
10694 CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_SUDELAY_MASK)) in CMU_HFRCOStartupDelaySet()
10772 while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) ; in CMU_USHFRCOBandSet()
10774 CMU->USHFRCOCTRL = freqCal; in CMU_USHFRCOBandSet()
10838 hfxoCtrl = CMU->HFXOCTRL & ~(userSel in CMU_HFXOAutostartEnable()
10848 CMU->HFXOCTRL = hfxoCtrl; in CMU_HFXOAutostartEnable()
10890 CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_MODE_MASK) | tmp; in CMU_HFXOInit()
10899 CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_HFXOX2EN_MASK) | tmp; in CMU_HFXOInit()
10903 CMU->HFXOSTARTUPCTRL = (hfxoInit->ctuneStartup in CMU_HFXOInit()
10908 CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL in CMU_HFXOInit()
10917 CMU->HFXOTIMEOUTCTRL = (hfxoInit->timeoutPeakDetect in CMU_HFXOInit()
10934 CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_MODE_MASK) in CMU_HFXOInit()
10936 BUS_RegBitWrite(&CMU->HFXOCTRL, in CMU_HFXOInit()
10944 CMU->HFXOCTRL1 = (CMU->HFXOCTRL1 & ~_CMU_HFXOCTRL1_PEAKDETTHR_MASK) in CMU_HFXOInit()
10949 CMU->HFXOSTARTUPCTRL = ((uint32_t)hfxoInit->ctuneStartup in CMU_HFXOInit()
10954 CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL in CMU_HFXOInit()
10968 CMU->HFXOTIMEOUTCTRL = ((uint32_t)hfxoInit->timeoutPeakDetect in CMU_HFXOInit()
10978 CMU->CTRL = (CMU->CTRL & ~(_CMU_CTRL_HFXOTIMEOUT_MASK in CMU_HFXOInit()
10999 return (CMU->LCDCTRL & _CMU_LCDCTRL_FDIV_MASK) >> _CMU_LCDCTRL_FDIV_SHIFT; in CMU_LCDClkFDIVGet()
11024 if (CMU->LFACLKEN0 & CMU_LFACLKEN0_LCD) { in CMU_LCDClkFDIVSet()
11030 CMU->LCDCTRL = (CMU->LCDCTRL & ~_CMU_LCDCTRL_FDIV_MASK) | div; in CMU_LCDClkFDIVSet()
11054 uint32_t reg = (CMU->LFXOCTRL & ~(_CMU_LFXOCTRL_TUNING_MASK in CMU_LFXOInit()
11066 if (reg != CMU->LFXOCTRL) { in CMU_LFXOInit()
11068 CMU->LFXOCTRL = reg; in CMU_LFXOInit()
11075 BUS_RegMaskedWrite(&CMU->CTRL, in CMU_LFXOInit()
11278 if ((CMU->HFXOCTRL & (_CMU_HFXOCTRL_MODE_MASK)) == CMU_HFXOCTRL_MODE_DIGEXTCLK) { in CMU_OscillatorEnable()
11284 CMU->OSCENCMD = enBit; in CMU_OscillatorEnable()
11288 while (BUS_RegBitRead(&CMU->STATUS, ensBitPos) == 0UL) { in CMU_OscillatorEnable()
11294 while (BUS_RegBitRead(&CMU->STATUS, rdyBitPos) == 0UL) { in CMU_OscillatorEnable()
11298 if ((CMU->HFXOCTRL & _CMU_HFXOCTRL_MODE_MASK) in CMU_OscillatorEnable()
11319 CMU->OSCENCMD = enBit; in CMU_OscillatorEnable()
11320 while (BUS_RegBitRead(&CMU->STATUS, rdyBitPos) == 0UL) { in CMU_OscillatorEnable()
11326 CMU->OSCENCMD = disBit; in CMU_OscillatorEnable()
11330 while ((CMU->STATUS & (0x1 << ensBitPos)) != 0U) { in CMU_OscillatorEnable()
11335 while ((CMU->STATUS & (0x1 << rdyBitPos)) != 0U) { in CMU_OscillatorEnable()
11364 ret = (CMU->LFRCOCTRL & _CMU_LFRCOCTRL_TUNING_MASK) in CMU_OscillatorTuningGet()
11369 ret = (CMU->HFRCOCTRL & _CMU_HFRCOCTRL_TUNING_MASK) in CMU_OscillatorTuningGet()
11375 ret = (CMU->USHFRCOCTRL & _CMU_USHFRCOCTRL_TUNING_MASK) in CMU_OscillatorTuningGet()
11381 ret = (CMU->AUXHFRCOCTRL & _CMU_AUXHFRCOCTRL_TUNING_MASK) in CMU_OscillatorTuningGet()
11387 ret = CMU->HFXOTRIMSTATUS & (_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK in CMU_OscillatorTuningGet()
11397 ret = (CMU->LFXOCTRL & _CMU_LFXOCTRL_TUNING_MASK) >> _CMU_LFXOCTRL_TUNING_SHIFT; in CMU_OscillatorTuningGet()
11448 while (BUS_RegBitRead(&CMU->SYNCBUSY, in CMU_OscillatorTuningSet()
11452 CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~(_CMU_LFRCOCTRL_TUNING_MASK)) in CMU_OscillatorTuningSet()
11461 while (BUS_RegBitRead(&CMU->SYNCBUSY, in CMU_OscillatorTuningSet()
11465 CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_TUNING_MASK)) in CMU_OscillatorTuningSet()
11475 while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) { in CMU_OscillatorTuningSet()
11478 CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~(_CMU_USHFRCOCTRL_TUNING_MASK)) in CMU_OscillatorTuningSet()
11488 while (BUS_RegBitRead(&CMU->SYNCBUSY, in CMU_OscillatorTuningSet()
11492 CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL & ~(_CMU_AUXHFRCOCTRL_TUNING_MASK)) in CMU_OscillatorTuningSet()
11500 EFM_ASSERT((CMU->STATUS & CMU_STATUS_HFXOENS) == 0UL); in CMU_OscillatorTuningSet()
11504 CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK) in CMU_OscillatorTuningSet()
11510 CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL in CMU_OscillatorTuningSet()
11517 CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL in CMU_OscillatorTuningSet()
11532 while (BUS_RegBitRead(&CMU->SYNCBUSY, in CMU_OscillatorTuningSet()
11535 CMU->LFXOCTRL = (CMU->LFXOCTRL & ~(_CMU_LFXOCTRL_TUNING_MASK)) in CMU_OscillatorTuningSet()
11596 while ((CMU->STATUS & waitFlags) != waitFlags) { in CMU_OscillatorTuningWait()
11602 return (CMU->IF & CMU_IF_HFXOPEAKDETERR) != 0UL ? true : false; in CMU_OscillatorTuningWait()
11636 CMU->IFC = CMU_IFC_HFXOPEAKDETERR; in CMU_OscillatorTuningOptimize()
11638 CMU->CMD = (uint32_t)mode; in CMU_OscillatorTuningOptimize()
11671 setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0; in CMU_PCNTClockExternalGet()
11676 setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0; in CMU_PCNTClockExternalGet()
11681 setting = CMU->PCNTCTRL & CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0; in CMU_PCNTClockExternalGet()
11715 BUS_RegBitWrite(&(CMU->PCNTCTRL), (instance * 2U) + 1U, setting); in CMU_PCNTClockExternalSet()
11733 return (CMU_USHFRCOBand_TypeDef)((CMU->USHFRCOCONF in CMU_USHFRCOBandGet()
11785 BUS_RegBitWrite(&CMU->USHFRCOCONF, _CMU_USHFRCOCONF_USHFRCODIV2DIS_SHIFT, 0); in CMU_USHFRCOBandSet()
11795 CMU->USHFRCOCONF = (CMU->USHFRCOCONF & ~_CMU_USHFRCOCONF_BAND_MASK) in CMU_USHFRCOBandSet()
11797 CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~_CMU_USHFRCOCTRL_TUNING_MASK) in CMU_USHFRCOBandSet()
11799 CMU->USHFRCOTUNE = (CMU->USHFRCOTUNE & ~_CMU_USHFRCOTUNE_FINETUNING_MASK) in CMU_USHFRCOBandSet()
11804 BUS_RegBitWrite(&CMU->USHFRCOCONF, _CMU_USHFRCOCONF_USHFRCODIV2DIS_SHIFT, 1); in CMU_USHFRCOBandSet()