213   uint32_t newCal;  in ADC_LoadDevinfoCal()  local
235   newCal = 0;  in ADC_LoadDevinfoCal()
251       newCal |= ((diCalReg[0] & DEVINFO_ADC0_GAIN1V25_MASK)  in ADC_LoadDevinfoCal()
254       newCal |= ((diCalReg[0] & DEVINFO_ADC0_OFFSET1V25_MASK)  in ADC_LoadDevinfoCal()
258       newCal |= ((diCalReg[0] & _DEVINFO_ADC0CAL0_NEGSEOFFSET1V25_MASK)  in ADC_LoadDevinfoCal()
265       newCal |= ((diCalReg[0] & DEVINFO_ADC0_GAIN2V5_MASK)  in ADC_LoadDevinfoCal()
268       newCal |= ((diCalReg[0] & DEVINFO_ADC0_OFFSET2V5_MASK)  in ADC_LoadDevinfoCal()
272       newCal |= ((diCalReg[0] & _DEVINFO_ADC0CAL0_NEGSEOFFSET2V5_MASK)  in ADC_LoadDevinfoCal()
279       newCal |= ((diCalReg[1] & DEVINFO_ADC0_GAINVDD_MASK)  in ADC_LoadDevinfoCal()
282       newCal |= ((diCalReg[1] & DEVINFO_ADC0_OFFSETVDD_MASK)  in ADC_LoadDevinfoCal()
286       newCal |= ((diCalReg[1] & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK)  in ADC_LoadDevinfoCal()
293       newCal |= ((diCalReg[1] & DEVINFO_ADC0_GAIN5VDIFF_MASK)  in ADC_LoadDevinfoCal()
296       newCal |= ((diCalReg[1] & DEVINFO_ADC0_OFFSET5VDIFF_MASK)  in ADC_LoadDevinfoCal()
300       newCal |= ((diCalReg[1] & _DEVINFO_ADC0CAL1_NEGSEOFFSET5VDIFF_MASK)  in ADC_LoadDevinfoCal()
308       newCal |= ((diCalReg[2] & DEVINFO_ADC0_OFFSET2XVDD_MASK)  in ADC_LoadDevinfoCal()
312       newCal |= ((diCalReg[2] & _DEVINFO_ADC0CAL2_NEGSEOFFSET2XVDD_MASK)  in ADC_LoadDevinfoCal()
320       newCal |= ((diCalReg[1] & DEVINFO_ADC0_GAINVDD_MASK)  in ADC_LoadDevinfoCal()
323       newCal |= ((diCalReg[1] & DEVINFO_ADC0_OFFSETVDD_MASK)  in ADC_LoadDevinfoCal()
326       newCal |= ((diCalReg[1] & _DEVINFO_ADC0CAL1_NEGSEOFFSETVDD_MASK)  in ADC_LoadDevinfoCal()
337       newCal = 0;  in ADC_LoadDevinfoCal()
341   adc->CAL = calReg | (newCal << shift);  in ADC_LoadDevinfoCal()