13 void pll_init(PLL pll, uint refdiv, uint vco_freq, uint post_div1, uint post_div2) {  in pll_init()  argument
42     if ((pll->cs & PLL_CS_LOCK_BITS) &&  in pll_init()
43         (refdiv == (pll->cs & PLL_CS_REFDIV_BITS)) &&  in pll_init()
44         (fbdiv  == (pll->fbdiv_int & PLL_FBDIV_INT_BITS)) &&  in pll_init()
45         (pdiv   == (pll->prim & (PLL_PRIM_POSTDIV1_BITS | PLL_PRIM_POSTDIV2_BITS)))) {  in pll_init()
50     reset_unreset_block_num_wait_blocking(PLL_RESET_NUM(pll));  in pll_init()
53     pll->cs = refdiv;  in pll_init()
54     pll->fbdiv_int = fbdiv;  in pll_init()
60     hw_clear_bits(&pll->pwr, power);  in pll_init()
63     while (!(pll->cs & PLL_CS_LOCK_BITS)) tight_loop_contents();  in pll_init()
66     pll->prim = pdiv;  in pll_init()
69     hw_clear_bits(&pll->pwr, PLL_PWR_POSTDIVPD_BITS);  in pll_init()
73 void pll_deinit(PLL pll) {  in pll_deinit()  argument
75     pll->pwr = PLL_PWR_BITS;  in pll_deinit()