29 static inline bool has_glitchless_mux(clock_handle_t clock) {  in has_glitchless_mux()  argument
30     return clock == clk_sys || clock == clk_ref;  in has_glitchless_mux()
33 void clock_stop(clock_handle_t clock) {  in clock_stop()  argument
34     clock_hw_t *clock_hw = &clocks_hw->clk[clock];  in clock_stop()
36     configured_freq[clock] = 0;  in clock_stop()
40 static void clock_configure_internal(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t …  in clock_configure_internal()  argument
41     clock_hw_t *clock_hw = &clocks_hw->clk[clock];  in clock_configure_internal()
52     if (has_glitchless_mux(clock) && src == CLOCKS_CLK_SYS_CTRL_SRC_VALUE_CLKSRC_CLK_SYS_AUX) {  in clock_configure_internal()
64         if (configured_freq[clock] > 0) {  in clock_configure_internal()
68             uint delay_cyc = configured_freq[clk_sys] / configured_freq[clock] + 1;  in clock_configure_internal()
79     if (has_glitchless_mux(clock)) {  in clock_configure_internal()
95     configured_freq[clock] = actual_freq;  in clock_configure_internal()
98 bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_freq, uint32…  in clock_configure()  argument
107     clock_configure_internal(clock, src, auxsrc, actual_freq, div);  in clock_configure()
112 void clock_configure_int_divider(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_…  in clock_configure_int_divider()  argument
113 …clock_configure_internal(clock, src, auxsrc, src_freq / int_divider, int_divider << CLOCKS_CLK_GPO…  in clock_configure_int_divider()
116 void clock_configure_undivided(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_fr…  in clock_configure_undivided()  argument
117     clock_configure_internal(clock, src, auxsrc, src_freq, 1u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB);  in clock_configure_undivided()
123 uint32_t clock_get_hz(clock_handle_t clock) {  in clock_get_hz()  argument
124     return configured_freq[clock];  in clock_get_hz()
128 void clock_set_reported_hz(clock_handle_t clock, uint hz) {  in clock_set_reported_hz()  argument
129     configured_freq[clock] = hz;  in clock_set_reported_hz()
299 bool clock_configure_gpin(clock_handle_t clock, uint gpio, uint32_t src_freq, uint32_t freq) {  in clock_configure_gpin()  argument
316     uint auxsrc = gpin0_src[clock] + gpin;  in clock_configure_gpin()
318     if (has_glitchless_mux(clock)) {  in clock_configure_gpin()
328     return clock_configure(clock, src, auxsrc, src_freq, freq);  in clock_configure_gpin()