Lines Matching refs:CRG_TOP
154 if (sys_read32(REG_TO_PTR(CRG_TOP->PMU_TRIM_REG)) == 0x00008800) { in da1469x_TSMC_pd_apply_preferred()
155 sys_write32(0x00007700, REG_TO_PTR(CRG_TOP->PMU_TRIM_REG)); in da1469x_TSMC_pd_apply_preferred()
157 write32_mask(0x00001000, 0x00001020, REG_TO_PTR(CRG_TOP->BANDGAP_REG)); in da1469x_TSMC_pd_apply_preferred()
158 sys_write32(0x000000ca, REG_TO_PTR(CRG_TOP->BIAS_VREF_SEL_REG)); in da1469x_TSMC_pd_apply_preferred()
159 write32_mask(0x0003ffff, 0x041e6ef4, REG_TO_PTR(CRG_TOP->BOD_LVL_CTRL0_REG)); in da1469x_TSMC_pd_apply_preferred()
183 write32_mask(0x00001000, 0x00001020, REG_TO_PTR(CRG_TOP->BANDGAP_REG)); in da1469x_GF_pd_apply_preferred()
184 sys_write32(0x000000ca, REG_TO_PTR(CRG_TOP->BIAS_VREF_SEL_REG)); in da1469x_GF_pd_apply_preferred()
185 write32_mask(0x0003ffff, 0x041e6ef4, REG_TO_PTR(CRG_TOP->BOD_LVL_CTRL0_REG)); in da1469x_GF_pd_apply_preferred()
186 write32_mask(0x00000f00, 0x00000dfc, REG_TO_PTR(CRG_TOP->CLK_RCX_REG)); in da1469x_GF_pd_apply_preferred()
187 write32_mask(0x0000007e, 0x00000024, REG_TO_PTR(CRG_TOP->CLK_XTAL32K_REG)); in da1469x_GF_pd_apply_preferred()
268 CRG_TOP->PMU_CTRL_REG &= ~bitmask; in da1469x_pd_acquire_internal()
271 while ((CRG_TOP->SYS_STAT_REG & bitmask) == 0); in da1469x_pd_acquire_internal()
316 CRG_TOP->PMU_CTRL_REG |= bitmask; in da1469x_pd_release_internal()
320 while ((CRG_TOP->SYS_STAT_REG & bitmask) == 0); in da1469x_pd_release_internal()