234     uint8 Instance, boolean ErrorFlag
303     boolean ErrorFlag = (boolean)FALSE;  in Spi_Ip_TransferProcess()
314             ErrorFlag = (boolean)TRUE;  in Spi_Ip_TransferProcess()
327             if((boolean)FALSE == State->PhyUnitConfig->SlaveMode)  in Spi_Ip_TransferProcess()
354         if ((State->RxIndex == State->ExpectedFifoReads) || ((boolean)TRUE == ErrorFlag))  in Spi_Ip_TransferProcess()
357             if(((boolean)TRUE == ErrorFlag) || ((boolean)FALSE == State->KeepCs))  in Spi_Ip_TransferProcess()
518     if ((boolean)FALSE == State->PhyUnitConfig->SlaveMode)  in Spi_Ip_PrepareTransfer()
1067     if ((boolean)FALSE == State->PhyUnitConfig->SlaveMode)  in Spi_Ip_DmaAsyncStart()
1243 static void Spi_Ip_ChannelFinished(uint8 Instance, boolean ErrorFlag)  in Spi_Ip_ChannelFinished()
1289     if ((boolean)FALSE == State->PhyUnitConfig->SlaveMode)  in Spi_Ip_AsyncStart()
1397     boolean ErrorFlag = (boolean)FALSE;  in Spi_Ip_IrqDmaHandler()
1398     boolean EndOfTransferFlag = (boolean)FALSE;  in Spi_Ip_IrqDmaHandler()
1409             ErrorFlag = (boolean)TRUE;  in Spi_Ip_IrqDmaHandler()
1419                 EndOfTransferFlag = (boolean)TRUE;  in Spi_Ip_IrqDmaHandler()
1423         if (((boolean)TRUE == EndOfTransferFlag) || ((boolean)TRUE == ErrorFlag))  in Spi_Ip_IrqDmaHandler()
1426             if(((boolean)TRUE == ErrorFlag) || ((boolean)FALSE == State->KeepCs))  in Spi_Ip_IrqDmaHandler()
1436             if((boolean)TRUE == ErrorFlag)  in Spi_Ip_IrqDmaHandler()
1446                 if((boolean)TRUE == ErrorFlag)  in Spi_Ip_IrqDmaHandler()
1514     State->KeepCs = (boolean)FALSE;  in Spi_Ip_Init()
1520     if((boolean)TRUE == State->PhyUnitConfig->DmaUsed)  in Spi_Ip_Init()
1588 static boolean Spi_Ip_SyncReadWriteStep(Spi_Ip_StateStructureType *State, SPI_Type *Base, uint8 Ins…  in Spi_Ip_SyncReadWriteStep()
1590     boolean StepDone = FALSE;  in Spi_Ip_SyncReadWriteStep()
1657     boolean StepDone;  in Spi_Ip_SyncTransmit()
1706         if((SPI_IP_STATUS_SUCCESS != Status) || ((boolean)FALSE == State->KeepCs))  in Spi_Ip_SyncTransmit()
1753         if((boolean)FALSE == State->PhyUnitConfig->DmaUsed)  in Spi_Ip_AsyncTransmit()
1852         State->KeepCs = (boolean)FALSE;  in Spi_Ip_AsyncTransmitFast()
1878     boolean ClearCS = (boolean)FALSE;  in Spi_Ip_DmaFastConfig()
1916             ClearCS = (boolean)TRUE;  in Spi_Ip_DmaFastConfig()
1921             if((boolean)FALSE == FastTransferCfg[Count].KeepCs)  in Spi_Ip_DmaFastConfig()
1923                 ClearCS = (boolean)TRUE;  in Spi_Ip_DmaFastConfig()
1927                 ClearCS = (boolean)FALSE;  in Spi_Ip_DmaFastConfig()
1933         if((boolean)TRUE == ClearCS)  in Spi_Ip_DmaFastConfig()
2012         if((boolean)FALSE == State->PhyUnitConfig->DmaUsed)  in Spi_Ip_ManageBuffers()
2022             if((boolean)TRUE == DmaChannelStatus.Done)  in Spi_Ip_ManageBuffers()
2097 Spi_Ip_StatusType Spi_Ip_UpdateLsb(const Spi_Ip_ExternalDeviceType *ExternalDevice, boolean Lsb)  in Spi_Ip_UpdateLsb()
2190         if((boolean)TRUE == State->PhyUnitConfig->DmaUsed)  in Spi_Ip_Cancel()
2195             if((boolean)FALSE == State->PhyUnitConfig->SlaveMode)  in Spi_Ip_Cancel()