Lines Matching refs:u
123 #define S32_NVIC_ICTR_ICTR_SHIFT 0u
128 #define S32_NVIC_ISER_SETENA_SHIFT 0u
133 #define S32_NVIC_ICER_CLRENA_SHIFT 0u
138 #define S32_NVIC_ISPR_SETPEND_SHIFT 0u
143 #define S32_NVIC_ICPR_CLRPEND_SHIFT 0u
148 #define S32_NVIC_IABR_ACTIVE_SHIFT 0u
153 #define S32_NVIC_IP_PRI0_SHIFT 0u
157 #define S32_NVIC_IP_PRI1_SHIFT 0u
161 #define S32_NVIC_IP_PRI2_SHIFT 0u
165 #define S32_NVIC_IP_PRI3_SHIFT 0u
169 #define S32_NVIC_IP_PRI4_SHIFT 0u
173 #define S32_NVIC_IP_PRI5_SHIFT 0u
177 #define S32_NVIC_IP_PRI6_SHIFT 0u
181 #define S32_NVIC_IP_PRI7_SHIFT 0u
185 #define S32_NVIC_IP_PRI8_SHIFT 0u
189 #define S32_NVIC_IP_PRI9_SHIFT 0u
193 #define S32_NVIC_IP_PRI10_SHIFT 0u
197 #define S32_NVIC_IP_PRI11_SHIFT 0u
201 #define S32_NVIC_IP_PRI12_SHIFT 0u
205 #define S32_NVIC_IP_PRI13_SHIFT 0u
209 #define S32_NVIC_IP_PRI14_SHIFT 0u
213 #define S32_NVIC_IP_PRI15_SHIFT 0u
217 #define S32_NVIC_IP_PRI16_SHIFT 0u
221 #define S32_NVIC_IP_PRI17_SHIFT 0u
225 #define S32_NVIC_IP_PRI18_SHIFT 0u
229 #define S32_NVIC_IP_PRI19_SHIFT 0u
233 #define S32_NVIC_IP_PRI20_SHIFT 0u
237 #define S32_NVIC_IP_PRI21_SHIFT 0u
241 #define S32_NVIC_IP_PRI22_SHIFT 0u
245 #define S32_NVIC_IP_PRI23_SHIFT 0u
249 #define S32_NVIC_IP_PRI24_SHIFT 0u
253 #define S32_NVIC_IP_PRI25_SHIFT 0u
257 #define S32_NVIC_IP_PRI26_SHIFT 0u
261 #define S32_NVIC_IP_PRI27_SHIFT 0u
265 #define S32_NVIC_IP_PRI28_SHIFT 0u
269 #define S32_NVIC_IP_PRI29_SHIFT 0u
273 #define S32_NVIC_IP_PRI30_SHIFT 0u
277 #define S32_NVIC_IP_PRI31_SHIFT 0u
281 #define S32_NVIC_IP_PRI32_SHIFT 0u
285 #define S32_NVIC_IP_PRI33_SHIFT 0u
289 #define S32_NVIC_IP_PRI34_SHIFT 0u
293 #define S32_NVIC_IP_PRI35_SHIFT 0u
297 #define S32_NVIC_IP_PRI36_SHIFT 0u
301 #define S32_NVIC_IP_PRI37_SHIFT 0u
305 #define S32_NVIC_IP_PRI38_SHIFT 0u
309 #define S32_NVIC_IP_PRI39_SHIFT 0u
313 #define S32_NVIC_IP_PRI40_SHIFT 0u
317 #define S32_NVIC_IP_PRI41_SHIFT 0u
321 #define S32_NVIC_IP_PRI42_SHIFT 0u
325 #define S32_NVIC_IP_PRI43_SHIFT 0u
329 #define S32_NVIC_IP_PRI44_SHIFT 0u
333 #define S32_NVIC_IP_PRI45_SHIFT 0u
337 #define S32_NVIC_IP_PRI46_SHIFT 0u
341 #define S32_NVIC_IP_PRI47_SHIFT 0u
345 #define S32_NVIC_IP_PRI48_SHIFT 0u
349 #define S32_NVIC_IP_PRI49_SHIFT 0u
353 #define S32_NVIC_IP_PRI50_SHIFT 0u
357 #define S32_NVIC_IP_PRI51_SHIFT 0u
361 #define S32_NVIC_IP_PRI52_SHIFT 0u
365 #define S32_NVIC_IP_PRI53_SHIFT 0u
369 #define S32_NVIC_IP_PRI54_SHIFT 0u
373 #define S32_NVIC_IP_PRI55_SHIFT 0u
377 #define S32_NVIC_IP_PRI56_SHIFT 0u
381 #define S32_NVIC_IP_PRI57_SHIFT 0u
385 #define S32_NVIC_IP_PRI58_SHIFT 0u
389 #define S32_NVIC_IP_PRI59_SHIFT 0u
393 #define S32_NVIC_IP_PRI60_SHIFT 0u
397 #define S32_NVIC_IP_PRI61_SHIFT 0u
401 #define S32_NVIC_IP_PRI62_SHIFT 0u
405 #define S32_NVIC_IP_PRI63_SHIFT 0u
409 #define S32_NVIC_IP_PRI64_SHIFT 0u
413 #define S32_NVIC_IP_PRI65_SHIFT 0u
417 #define S32_NVIC_IP_PRI66_SHIFT 0u
421 #define S32_NVIC_IP_PRI67_SHIFT 0u
425 #define S32_NVIC_IP_PRI68_SHIFT 0u
429 #define S32_NVIC_IP_PRI69_SHIFT 0u
433 #define S32_NVIC_IP_PRI70_SHIFT 0u
437 #define S32_NVIC_IP_PRI71_SHIFT 0u
441 #define S32_NVIC_IP_PRI72_SHIFT 0u
445 #define S32_NVIC_IP_PRI73_SHIFT 0u
449 #define S32_NVIC_IP_PRI74_SHIFT 0u
453 #define S32_NVIC_IP_PRI75_SHIFT 0u
457 #define S32_NVIC_IP_PRI76_SHIFT 0u
461 #define S32_NVIC_IP_PRI77_SHIFT 0u
465 #define S32_NVIC_IP_PRI78_SHIFT 0u
469 #define S32_NVIC_IP_PRI79_SHIFT 0u
473 #define S32_NVIC_IP_PRI80_SHIFT 0u
477 #define S32_NVIC_IP_PRI81_SHIFT 0u
481 #define S32_NVIC_IP_PRI82_SHIFT 0u
485 #define S32_NVIC_IP_PRI83_SHIFT 0u
489 #define S32_NVIC_IP_PRI84_SHIFT 0u
493 #define S32_NVIC_IP_PRI85_SHIFT 0u
497 #define S32_NVIC_IP_PRI86_SHIFT 0u
501 #define S32_NVIC_IP_PRI87_SHIFT 0u
505 #define S32_NVIC_IP_PRI88_SHIFT 0u
509 #define S32_NVIC_IP_PRI89_SHIFT 0u
513 #define S32_NVIC_IP_PRI90_SHIFT 0u
517 #define S32_NVIC_IP_PRI91_SHIFT 0u
521 #define S32_NVIC_IP_PRI92_SHIFT 0u
525 #define S32_NVIC_IP_PRI93_SHIFT 0u
529 #define S32_NVIC_IP_PRI94_SHIFT 0u
533 #define S32_NVIC_IP_PRI95_SHIFT 0u
537 #define S32_NVIC_IP_PRI96_SHIFT 0u
541 #define S32_NVIC_IP_PRI97_SHIFT 0u
545 #define S32_NVIC_IP_PRI98_SHIFT 0u
549 #define S32_NVIC_IP_PRI99_SHIFT 0u
553 #define S32_NVIC_IP_PRI100_SHIFT 0u
557 #define S32_NVIC_IP_PRI101_SHIFT 0u
561 #define S32_NVIC_IP_PRI102_SHIFT 0u
565 #define S32_NVIC_IP_PRI103_SHIFT 0u
569 #define S32_NVIC_IP_PRI104_SHIFT 0u
573 #define S32_NVIC_IP_PRI105_SHIFT 0u
577 #define S32_NVIC_IP_PRI106_SHIFT 0u
581 #define S32_NVIC_IP_PRI107_SHIFT 0u
585 #define S32_NVIC_IP_PRI108_SHIFT 0u
589 #define S32_NVIC_IP_PRI109_SHIFT 0u
593 #define S32_NVIC_IP_PRI110_SHIFT 0u
597 #define S32_NVIC_IP_PRI111_SHIFT 0u
601 #define S32_NVIC_IP_PRI112_SHIFT 0u
605 #define S32_NVIC_IP_PRI113_SHIFT 0u
609 #define S32_NVIC_IP_PRI114_SHIFT 0u
613 #define S32_NVIC_IP_PRI115_SHIFT 0u
617 #define S32_NVIC_IP_PRI116_SHIFT 0u
621 #define S32_NVIC_IP_PRI117_SHIFT 0u
625 #define S32_NVIC_IP_PRI118_SHIFT 0u
629 #define S32_NVIC_IP_PRI119_SHIFT 0u
633 #define S32_NVIC_IP_PRI120_SHIFT 0u
637 #define S32_NVIC_IP_PRI121_SHIFT 0u
641 #define S32_NVIC_IP_PRI122_SHIFT 0u
645 #define S32_NVIC_IP_PRI123_SHIFT 0u
649 #define S32_NVIC_IP_PRI124_SHIFT 0u
653 #define S32_NVIC_IP_PRI125_SHIFT 0u
657 #define S32_NVIC_IP_PRI126_SHIFT 0u
661 #define S32_NVIC_IP_PRI127_SHIFT 0u
665 #define S32_NVIC_IP_PRI128_SHIFT 0u
669 #define S32_NVIC_IP_PRI129_SHIFT 0u
673 #define S32_NVIC_IP_PRI130_SHIFT 0u
677 #define S32_NVIC_IP_PRI131_SHIFT 0u
681 #define S32_NVIC_IP_PRI132_SHIFT 0u
685 #define S32_NVIC_IP_PRI133_SHIFT 0u
689 #define S32_NVIC_IP_PRI134_SHIFT 0u
693 #define S32_NVIC_IP_PRI135_SHIFT 0u
697 #define S32_NVIC_IP_PRI136_SHIFT 0u
701 #define S32_NVIC_IP_PRI137_SHIFT 0u
705 #define S32_NVIC_IP_PRI138_SHIFT 0u
709 #define S32_NVIC_IP_PRI139_SHIFT 0u
713 #define S32_NVIC_IP_PRI140_SHIFT 0u
717 #define S32_NVIC_IP_PRI141_SHIFT 0u
721 #define S32_NVIC_IP_PRI142_SHIFT 0u
725 #define S32_NVIC_IP_PRI143_SHIFT 0u
729 #define S32_NVIC_IP_PRI144_SHIFT 0u
733 #define S32_NVIC_IP_PRI145_SHIFT 0u
737 #define S32_NVIC_IP_PRI146_SHIFT 0u
741 #define S32_NVIC_IP_PRI147_SHIFT 0u
745 #define S32_NVIC_IP_PRI148_SHIFT 0u
749 #define S32_NVIC_IP_PRI149_SHIFT 0u
753 #define S32_NVIC_IP_PRI150_SHIFT 0u
757 #define S32_NVIC_IP_PRI151_SHIFT 0u
761 #define S32_NVIC_IP_PRI152_SHIFT 0u
765 #define S32_NVIC_IP_PRI153_SHIFT 0u
769 #define S32_NVIC_IP_PRI154_SHIFT 0u
773 #define S32_NVIC_IP_PRI155_SHIFT 0u
777 #define S32_NVIC_IP_PRI156_SHIFT 0u
781 #define S32_NVIC_IP_PRI157_SHIFT 0u
785 #define S32_NVIC_IP_PRI158_SHIFT 0u
789 #define S32_NVIC_IP_PRI159_SHIFT 0u
793 #define S32_NVIC_IP_PRI160_SHIFT 0u
797 #define S32_NVIC_IP_PRI161_SHIFT 0u
801 #define S32_NVIC_IP_PRI162_SHIFT 0u
805 #define S32_NVIC_IP_PRI163_SHIFT 0u
809 #define S32_NVIC_IP_PRI164_SHIFT 0u
813 #define S32_NVIC_IP_PRI165_SHIFT 0u
817 #define S32_NVIC_IP_PRI166_SHIFT 0u
821 #define S32_NVIC_IP_PRI167_SHIFT 0u
825 #define S32_NVIC_IP_PRI168_SHIFT 0u
829 #define S32_NVIC_IP_PRI169_SHIFT 0u
833 #define S32_NVIC_IP_PRI170_SHIFT 0u
837 #define S32_NVIC_IP_PRI171_SHIFT 0u
841 #define S32_NVIC_IP_PRI172_SHIFT 0u
845 #define S32_NVIC_IP_PRI173_SHIFT 0u
849 #define S32_NVIC_IP_PRI174_SHIFT 0u
853 #define S32_NVIC_IP_PRI175_SHIFT 0u
857 #define S32_NVIC_IP_PRI176_SHIFT 0u
861 #define S32_NVIC_IP_PRI177_SHIFT 0u
865 #define S32_NVIC_IP_PRI178_SHIFT 0u
869 #define S32_NVIC_IP_PRI179_SHIFT 0u
873 #define S32_NVIC_IP_PRI180_SHIFT 0u
877 #define S32_NVIC_IP_PRI181_SHIFT 0u
881 #define S32_NVIC_IP_PRI182_SHIFT 0u
885 #define S32_NVIC_IP_PRI183_SHIFT 0u
889 #define S32_NVIC_IP_PRI184_SHIFT 0u
893 #define S32_NVIC_IP_PRI185_SHIFT 0u
897 #define S32_NVIC_IP_PRI186_SHIFT 0u
901 #define S32_NVIC_IP_PRI187_SHIFT 0u
905 #define S32_NVIC_IP_PRI188_SHIFT 0u
909 #define S32_NVIC_IP_PRI189_SHIFT 0u
913 #define S32_NVIC_IP_PRI190_SHIFT 0u
917 #define S32_NVIC_IP_PRI191_SHIFT 0u
921 #define S32_NVIC_IP_PRI192_SHIFT 0u
925 #define S32_NVIC_IP_PRI193_SHIFT 0u
929 #define S32_NVIC_IP_PRI194_SHIFT 0u
933 #define S32_NVIC_IP_PRI195_SHIFT 0u
937 #define S32_NVIC_IP_PRI196_SHIFT 0u
941 #define S32_NVIC_IP_PRI197_SHIFT 0u
945 #define S32_NVIC_IP_PRI198_SHIFT 0u
949 #define S32_NVIC_IP_PRI199_SHIFT 0u
953 #define S32_NVIC_IP_PRI200_SHIFT 0u
957 #define S32_NVIC_IP_PRI201_SHIFT 0u
961 #define S32_NVIC_IP_PRI202_SHIFT 0u
965 #define S32_NVIC_IP_PRI203_SHIFT 0u
969 #define S32_NVIC_IP_PRI204_SHIFT 0u
973 #define S32_NVIC_IP_PRI205_SHIFT 0u
977 #define S32_NVIC_IP_PRI206_SHIFT 0u
981 #define S32_NVIC_IP_PRI207_SHIFT 0u
985 #define S32_NVIC_IP_PRI208_SHIFT 0u
989 #define S32_NVIC_IP_PRI209_SHIFT 0u
993 #define S32_NVIC_IP_PRI210_SHIFT 0u
997 #define S32_NVIC_IP_PRI211_SHIFT 0u
1001 #define S32_NVIC_IP_PRI212_SHIFT 0u
1005 #define S32_NVIC_IP_PRI213_SHIFT 0u
1009 #define S32_NVIC_IP_PRI214_SHIFT 0u
1013 #define S32_NVIC_IP_PRI215_SHIFT 0u
1017 #define S32_NVIC_IP_PRI216_SHIFT 0u
1021 #define S32_NVIC_IP_PRI217_SHIFT 0u
1025 #define S32_NVIC_IP_PRI218_SHIFT 0u
1029 #define S32_NVIC_IP_PRI219_SHIFT 0u
1033 #define S32_NVIC_IP_PRI220_SHIFT 0u
1037 #define S32_NVIC_IP_PRI221_SHIFT 0u
1041 #define S32_NVIC_IP_PRI222_SHIFT 0u
1045 #define S32_NVIC_IP_PRI223_SHIFT 0u
1049 #define S32_NVIC_IP_PRI224_SHIFT 0u
1053 #define S32_NVIC_IP_PRI225_SHIFT 0u
1057 #define S32_NVIC_IP_PRI226_SHIFT 0u
1061 #define S32_NVIC_IP_PRI227_SHIFT 0u
1065 #define S32_NVIC_IP_PRI228_SHIFT 0u
1069 #define S32_NVIC_IP_PRI229_SHIFT 0u
1073 #define S32_NVIC_IP_PRI230_SHIFT 0u
1077 #define S32_NVIC_IP_PRI231_SHIFT 0u
1081 #define S32_NVIC_IP_PRI232_SHIFT 0u
1085 #define S32_NVIC_IP_PRI233_SHIFT 0u
1089 #define S32_NVIC_IP_PRI234_SHIFT 0u
1093 #define S32_NVIC_IP_PRI235_SHIFT 0u
1097 #define S32_NVIC_IP_PRI236_SHIFT 0u
1101 #define S32_NVIC_IP_PRI237_SHIFT 0u
1105 #define S32_NVIC_IP_PRI238_SHIFT 0u
1109 #define S32_NVIC_IP_PRI239_SHIFT 0u
1114 #define S32_NVIC_STIR_INTID_SHIFT 0u