Lines Matching refs:number
261 sdadc_channel_number_t number; /*!< Sets channel number. */ member
298 sdadc_channel_number_t number; /*!< Channel number. */ member
364 sdadc_channel_number_t number, in SDADC_ControlModulatorPowerEnable() argument
372 base->ADC_CTL_0 |= (0x1U << (number + SDADC_ADC_CTL_0_ADCP_POWER_ENABLE_SHIFT)); in SDADC_ControlModulatorPowerEnable()
376 base->ADC_CTL_0 |= (0x1U << (number + SDADC_ADC_CTL_0_ADCN_POWER_ENABLE_SHIFT)); in SDADC_ControlModulatorPowerEnable()
380 base->ADC_CTL_0 |= ((0x1U << (number + SDADC_ADC_CTL_0_ADCP_POWER_ENABLE_SHIFT)) | in SDADC_ControlModulatorPowerEnable()
381 (0x1U << (number + SDADC_ADC_CTL_0_ADCN_POWER_ENABLE_SHIFT))); in SDADC_ControlModulatorPowerEnable()
388 base->ADC_CTL_0 &= ~(0x1U << (number + SDADC_ADC_CTL_0_ADCP_POWER_ENABLE_SHIFT)); in SDADC_ControlModulatorPowerEnable()
392 base->ADC_CTL_0 &= ~(0x1U << (number + SDADC_ADC_CTL_0_ADCN_POWER_ENABLE_SHIFT)); in SDADC_ControlModulatorPowerEnable()
396 base->ADC_CTL_0 &= ~((0x1U << (number + SDADC_ADC_CTL_0_ADCP_POWER_ENABLE_SHIFT)) | in SDADC_ControlModulatorPowerEnable()
397 (0x1U << (number + SDADC_ADC_CTL_0_ADCN_POWER_ENABLE_SHIFT))); in SDADC_ControlModulatorPowerEnable()
488 sdadc_channel_number_t number, in SDADC_ConfigureChannelMode() argument
493 base->ADC_CTL_1 &= ~(0x01U << (SDADC_ADC_CTL_1_DIFF_ENABLE_SHIFT + number)); in SDADC_ConfigureChannelMode()
497 base->ADC_CTL_1 |= (0x01U << (SDADC_ADC_CTL_1_DIFF_ENABLE_SHIFT + number)); in SDADC_ConfigureChannelMode()
512 sdadc_channel_number_t number, in SDADC_ControlDacCompensationEnable() argument
520 base->ADC_CTL_0 |= (0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCP_ENABLE_SHIFT)); in SDADC_ControlDacCompensationEnable()
524 base->ADC_CTL_0 |= (0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCN_ENABLE_SHIFT)); in SDADC_ControlDacCompensationEnable()
528 base->ADC_CTL_0 |= ((0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCP_ENABLE_SHIFT)) | in SDADC_ControlDacCompensationEnable()
529 (0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCN_ENABLE_SHIFT))); in SDADC_ControlDacCompensationEnable()
536 base->ADC_CTL_0 &= ~(0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCP_ENABLE_SHIFT)); in SDADC_ControlDacCompensationEnable()
540 base->ADC_CTL_0 &= ~(0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCN_ENABLE_SHIFT)); in SDADC_ControlDacCompensationEnable()
544 base->ADC_CTL_0 &= ~((0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCP_ENABLE_SHIFT)) | in SDADC_ControlDacCompensationEnable()
545 (0x1U << (number + SDADC_ADC_CTL_0_COMP_ADCN_ENABLE_SHIFT))); in SDADC_ControlDacCompensationEnable()
561 sdadc_channel_number_t number, in SDADC_ControlModulatorDcLoopEnable() argument
569 base->ADC_CTL_1 |= (0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_P_ANA_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
570 base->DC_LOOP_CTL_0 |= (0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_P_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
574 base->ADC_CTL_1 |= (0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_N_ANA_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
575 base->DC_LOOP_CTL_0 |= (0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_N_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
579 base->ADC_CTL_1 |= ((0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_P_ANA_ENABLE_SHIFT)) | in SDADC_ControlModulatorDcLoopEnable()
580 (0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_N_ANA_ENABLE_SHIFT))); in SDADC_ControlModulatorDcLoopEnable()
581 base->DC_LOOP_CTL_0 |= ((0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_P_ENABLE_SHIFT)) | in SDADC_ControlModulatorDcLoopEnable()
582 (0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_N_ENABLE_SHIFT))); in SDADC_ControlModulatorDcLoopEnable()
589 base->ADC_CTL_1 &= ~(0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_P_ANA_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
590 base->DC_LOOP_CTL_0 &= ~(0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_P_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
594 base->ADC_CTL_1 &= ~(0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_N_ANA_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
595 base->DC_LOOP_CTL_0 &= ~(0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_N_ENABLE_SHIFT)); in SDADC_ControlModulatorDcLoopEnable()
599 base->ADC_CTL_1 &= ~((0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_P_ANA_ENABLE_SHIFT)) | in SDADC_ControlModulatorDcLoopEnable()
600 (0x1U << (number + SDADC_ADC_CTL_1_DCLOOP_N_ANA_ENABLE_SHIFT))); in SDADC_ControlModulatorDcLoopEnable()
601 … base->DC_LOOP_CTL_0 &= ~((0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_P_ENABLE_SHIFT)) | in SDADC_ControlModulatorDcLoopEnable()
602 … (0x1U << (number + SDADC_DC_LOOP_CTL_0_DCLOOP_N_ENABLE_SHIFT))); in SDADC_ControlModulatorDcLoopEnable()
618 sdadc_channel_number_t number, in SDADC_ControlDecimatorDcFilterEnable() argument
626 … base->DECIMATOR_CTL_0 |= (0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_P_ENABLE_SHIFT)); in SDADC_ControlDecimatorDcFilterEnable()
630 … base->DECIMATOR_CTL_0 |= (0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_N_ENABLE_SHIFT)); in SDADC_ControlDecimatorDcFilterEnable()
634 … base->DECIMATOR_CTL_0 |= ((0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_P_ENABLE_SHIFT)) | in SDADC_ControlDecimatorDcFilterEnable()
635 … (0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_N_ENABLE_SHIFT))); in SDADC_ControlDecimatorDcFilterEnable()
642 … base->DECIMATOR_CTL_0 &= ~(0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_P_ENABLE_SHIFT)); in SDADC_ControlDecimatorDcFilterEnable()
646 … base->DECIMATOR_CTL_0 &= ~(0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_N_ENABLE_SHIFT)); in SDADC_ControlDecimatorDcFilterEnable()
650 … base->DECIMATOR_CTL_0 &= ~((0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_P_ENABLE_SHIFT)) | in SDADC_ControlDecimatorDcFilterEnable()
651 … (0x1U << (number + SDADC_DECIMATOR_CTL_0_DCFILTI_N_ENABLE_SHIFT))); in SDADC_ControlDecimatorDcFilterEnable()
667 sdadc_channel_number_t number, in SDADC_ControlDecimatorOutputInvertEnable() argument
675 … base->DECIMATOR_CTL_0 |= (0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_P_ENABLE_SHIFT)); in SDADC_ControlDecimatorOutputInvertEnable()
679 … base->DECIMATOR_CTL_0 |= (0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_N_ENABLE_SHIFT)); in SDADC_ControlDecimatorOutputInvertEnable()
683 … base->DECIMATOR_CTL_0 |= ((0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_P_ENABLE_SHIFT)) | in SDADC_ControlDecimatorOutputInvertEnable()
684 … (0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_N_ENABLE_SHIFT))); in SDADC_ControlDecimatorOutputInvertEnable()
691 … base->DECIMATOR_CTL_0 &= ~(0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_P_ENABLE_SHIFT)); in SDADC_ControlDecimatorOutputInvertEnable()
695 … base->DECIMATOR_CTL_0 &= ~(0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_N_ENABLE_SHIFT)); in SDADC_ControlDecimatorOutputInvertEnable()
699 … base->DECIMATOR_CTL_0 &= ~((0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_P_ENABLE_SHIFT)) | in SDADC_ControlDecimatorOutputInvertEnable()
700 … (0x1U << (number + SDADC_DECIMATOR_CTL_0_POL_INV_N_ENABLE_SHIFT))); in SDADC_ControlDecimatorOutputInvertEnable()
714 sdadc_channel_number_t number, in SDADC_ConfigureDecimatorVolume() argument
718 uint8_t registerOffset = number / 2U; in SDADC_ConfigureDecimatorVolume()
719 uint8_t bitfieldOffset = number % 2U * 16U; in SDADC_ConfigureDecimatorVolume()
752 sdadc_channel_number_t number, in SDADC_ConfigureDecimatorSampleRate() argument
758 … base->DECIMATOR_CTL_4 = ((base->DECIMATOR_CTL_4 & (~SDADC_DECIMATOR_SET_SPEED_P_MASK(number))) | in SDADC_ConfigureDecimatorSampleRate()
759 SDADC_DECIMATOR_SET_SPEED_P(sampleRate.pSideSampleRate, number)); in SDADC_ConfigureDecimatorSampleRate()
763 … base->DECIMATOR_CTL_4 = ((base->DECIMATOR_CTL_4 & (~SDADC_DECIMATOR_SET_SPEED_N_MASK(number))) | in SDADC_ConfigureDecimatorSampleRate()
764 SDADC_DECIMATOR_SET_SPEED_N(sampleRate.nSideSampleRate, number)); in SDADC_ConfigureDecimatorSampleRate()
770 … (~(SDADC_DECIMATOR_SET_SPEED_P_MASK(number) | SDADC_DECIMATOR_SET_SPEED_N_MASK(number)))) | in SDADC_ConfigureDecimatorSampleRate()
771 (SDADC_DECIMATOR_SET_SPEED_P(sampleRate.pSideSampleRate, number) | in SDADC_ConfigureDecimatorSampleRate()
772 SDADC_DECIMATOR_SET_SPEED_N(sampleRate.nSideSampleRate, number))); in SDADC_ConfigureDecimatorSampleRate()
789 sdadc_channel_number_t number, in SDADC_ConfigureDitherAmplitude() argument
792 base->ADC_CTL_2 = ((base->ADC_CTL_2 & (~SDADC_ADC_CTL_2_SET_DITHER_MASK(number))) | in SDADC_ConfigureDitherAmplitude()
793 (SDADC_ADC_CTL_2_SET_DITHER(ditherAmplitude, number))); in SDADC_ConfigureDitherAmplitude()
817 sdadc_channel_number_t number, in SDADC_ControlModulatorReset() argument
825 base->ADC_CTL_0 &= ~(0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCP_SHIFT)); in SDADC_ControlModulatorReset()
829 base->ADC_CTL_0 &= ~(0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCN_SHIFT)); in SDADC_ControlModulatorReset()
833 base->ADC_CTL_0 &= ~((0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCP_SHIFT)) | in SDADC_ControlModulatorReset()
834 (0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCN_SHIFT))); in SDADC_ControlModulatorReset()
841 base->ADC_CTL_0 |= (0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCP_SHIFT)); in SDADC_ControlModulatorReset()
845 base->ADC_CTL_0 |= (0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCN_SHIFT)); in SDADC_ControlModulatorReset()
849 base->ADC_CTL_0 |= ((0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCP_SHIFT)) | in SDADC_ControlModulatorReset()
850 (0x1U << (number + SDADC_ADC_CTL_0_RST_AN_ADCN_SHIFT))); in SDADC_ControlModulatorReset()
866 sdadc_channel_number_t number, in SDADC_ControlDecimatorReset() argument
874 …base->DECIMATOR_CTL_1 &= ~(0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_P_SHIFT)); in SDADC_ControlDecimatorReset()
878 …base->DECIMATOR_CTL_1 &= ~(0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_N_SHIFT)); in SDADC_ControlDecimatorReset()
882 …base->DECIMATOR_CTL_1 &= ~((0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_P_SHIFT)… in SDADC_ControlDecimatorReset()
883 … (0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_N_SHIFT))); in SDADC_ControlDecimatorReset()
890 … base->DECIMATOR_CTL_1 |= (0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_P_SHIFT)); in SDADC_ControlDecimatorReset()
894 … base->DECIMATOR_CTL_1 |= (0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_N_SHIFT)); in SDADC_ControlDecimatorReset()
898 …base->DECIMATOR_CTL_1 |= ((0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_P_SHIFT))… in SDADC_ControlDecimatorReset()
899 … (0x1U << (number + SDADC_DECIMATOR_CTL_1_FUNC_LOCAL_RST_AN_DEC_N_SHIFT))); in SDADC_ControlDecimatorReset()
916 sdadc_channel_number_t number, in SDADC_ConfigureModulatorDcLoopReset() argument
924 … base->DC_LOOP_CTL_1 &= ~(0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_P_SHIFT)); in SDADC_ConfigureModulatorDcLoopReset()
928 … base->DC_LOOP_CTL_1 &= ~(0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_N_SHIFT)); in SDADC_ConfigureModulatorDcLoopReset()
932 …base->DC_LOOP_CTL_1 &= ~((0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_P_SHIFT))… in SDADC_ConfigureModulatorDcLoopReset()
933 … (0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_N_SHIFT))); in SDADC_ConfigureModulatorDcLoopReset()
940 … base->DC_LOOP_CTL_1 |= (0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_P_SHIFT)); in SDADC_ConfigureModulatorDcLoopReset()
944 … base->DC_LOOP_CTL_1 |= (0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_N_SHIFT)); in SDADC_ConfigureModulatorDcLoopReset()
948 …base->DC_LOOP_CTL_1 |= ((0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_P_SHIFT)) | in SDADC_ConfigureModulatorDcLoopReset()
949 … (0x1U << (number + SDADC_DC_LOOP_CTL_1_FUNC_LOCAL_RST_AN_DCLOOP_N_SHIFT))); in SDADC_ConfigureModulatorDcLoopReset()
1083 sdadc_channel_number_t number, in SDADC_ConfigureFifoWatermark() argument
1089 …se->FIFO_WATERMARK_CTL = ((base->FIFO_WATERMARK_CTL & (~SDADC_FIFO_WATERMARK_CTL_P_MASK(number))) | in SDADC_ConfigureFifoWatermark()
1090 SDADC_FIFO_WATERMARK_CTL_P(waterMark.pSideWatermark, number)); in SDADC_ConfigureFifoWatermark()
1094 …se->FIFO_WATERMARK_CTL = ((base->FIFO_WATERMARK_CTL & (~SDADC_FIFO_WATERMARK_CTL_N_MASK(number))) | in SDADC_ConfigureFifoWatermark()
1095 SDADC_FIFO_WATERMARK_CTL_N(waterMark.nSideWatermark, number)); in SDADC_ConfigureFifoWatermark()
1101 … (~(SDADC_FIFO_WATERMARK_CTL_P_MASK(number) | SDADC_FIFO_WATERMARK_CTL_N_MASK(number)))) | in SDADC_ConfigureFifoWatermark()
1102 (SDADC_FIFO_WATERMARK_CTL_P(waterMark.pSideWatermark, number) | in SDADC_ConfigureFifoWatermark()
1103 SDADC_FIFO_WATERMARK_CTL_N(waterMark.nSideWatermark, number))); in SDADC_ConfigureFifoWatermark()
1116 sdadc_channel_number_t number, in SDADC_ControlFifoReadWriteReset() argument
1122 … base->FIFO_WR_RD_CTL |= (operation << ((number * 4U) + SDADC_FIFO_WR_RD_CTL_WR_0_P_RST_SHIFT)); in SDADC_ControlFifoReadWriteReset()
1126 … base->FIFO_WR_RD_CTL |= (operation << ((number * 4U) + SDADC_FIFO_WR_RD_CTL_WR_0_N_RST_SHIFT)); in SDADC_ControlFifoReadWriteReset()
1130 … base->FIFO_WR_RD_CTL |= ((operation << ((number * 4U) + SDADC_FIFO_WR_RD_CTL_WR_0_P_RST_SHIFT)) | in SDADC_ControlFifoReadWriteReset()
1131 … (operation << ((number * 4U) + SDADC_FIFO_WR_RD_CTL_WR_0_N_RST_SHIFT))); in SDADC_ControlFifoReadWriteReset()
1148 sdadc_channel_number_t number, in SDADC_GetConvChannelFifoAvailableEntries() argument
1151 uint8_t registerOffset = number / 2U; in SDADC_GetConvChannelFifoAvailableEntries()
1152 uint8_t bitfieldOffset = number % 2U * 16U; in SDADC_GetConvChannelFifoAvailableEntries()
1183 sdadc_channel_number_t number, in SDADC_GetConvChannelFifoRawData() argument
1190 offset = number * 2U; in SDADC_GetConvChannelFifoRawData()
1194 offset = number * 2U + 1U; in SDADC_GetConvChannelFifoRawData()