Lines Matching refs:pwmParams
267 const sctimer_pwm_signal_param_t *pwmParams, in SCTIMER_SetupPwm() argument
273 assert(NULL != pwmParams); in SCTIMER_SetupPwm()
276 assert((uint32_t)pwmParams->output < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS); in SCTIMER_SetupPwm()
308 if (pwmParams->dutyCyclePercent >= 100U) in SCTIMER_SetupPwm()
314 pulsePeriod = (uint32_t)(((uint64_t)period * pwmParams->dutyCyclePercent) / 100U); in SCTIMER_SetupPwm()
334 if ((uint32_t)pwmParams->level == (uint32_t)kSCTIMER_HighTrue) in SCTIMER_SetupPwm()
339 base->OUTPUT &= ~(1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
341 SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, periodEvent); in SCTIMER_SetupPwm()
343 SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
348 base->OUTPUT |= (1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
350 SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
353 … reg &= ~((uint32_t)SCT_OUTPUTDIRCTRL_SETCLR0_MASK << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()
354 reg |= (1UL << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()
364 base->OUTPUT |= (1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
366 SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, periodEvent); in SCTIMER_SetupPwm()
368 SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
373 base->OUTPUT &= ~(1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
375 SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
378 … reg &= ~((uint32_t)SCT_OUTPUTDIRCTRL_SETCLR0_MASK << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()
379 reg |= (1UL << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()