Lines Matching refs:output

276     assert((uint32_t)pwmParams->output < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS);  in SCTIMER_SetupPwm()
339 base->OUTPUT &= ~(1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
341 SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, periodEvent); in SCTIMER_SetupPwm()
343 SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
348 base->OUTPUT |= (1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
350 SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
353 … reg &= ~((uint32_t)SCT_OUTPUTDIRCTRL_SETCLR0_MASK << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()
354 reg |= (1UL << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()
364 base->OUTPUT |= (1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
366 SCTIMER_SetupOutputClearAction(base, (uint32_t)pwmParams->output, periodEvent); in SCTIMER_SetupPwm()
368 SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
373 base->OUTPUT &= ~(1UL << (uint32_t)pwmParams->output); in SCTIMER_SetupPwm()
375 SCTIMER_SetupOutputSetAction(base, (uint32_t)pwmParams->output, pulseEvent); in SCTIMER_SetupPwm()
378 … reg &= ~((uint32_t)SCT_OUTPUTDIRCTRL_SETCLR0_MASK << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()
379 reg |= (1UL << (2U * (uint32_t)pwmParams->output)); in SCTIMER_SetupPwm()
404 void SCTIMER_UpdatePwmDutycycle(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uin… in SCTIMER_UpdatePwmDutycycle() argument
408 assert((uint32_t)output < (uint32_t)FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS); in SCTIMER_UpdatePwmDutycycle()
413 bool isHighTrue = (0U != (base->OUT[output].CLR & (1UL << (event + 1U)))); in SCTIMER_UpdatePwmDutycycle()
434 base->OUTPUT |= (1UL << (uint32_t)output); in SCTIMER_UpdatePwmDutycycle()
438 base->OUTPUT &= ~(1UL << (uint32_t)output); in SCTIMER_UpdatePwmDutycycle()