Lines Matching refs:reg
175 uint16_t reg; in QTMR_SetupPwm() local
211 reg = base->CHANNEL[channel].CSCTRL; in QTMR_SetupPwm()
215 reg &= (uint16_t)(~(TMR_CSCTRL_CL1_MASK | TMR_CSCTRL_CL2_MASK)); in QTMR_SetupPwm()
216 reg |= (TMR_CSCTRL_CL1(kQTMR_LoadOnComp2) | TMR_CSCTRL_CL2(kQTMR_LoadOnComp1)); in QTMR_SetupPwm()
217 base->CHANNEL[channel].CSCTRL = reg; in QTMR_SetupPwm()
230 reg = base->CHANNEL[channel].CTRL; in QTMR_SetupPwm()
231 reg &= ~(uint16_t)TMR_CTRL_OUTMODE_MASK; in QTMR_SetupPwm()
235 reg |= (TMR_CTRL_LENGTH_MASK | TMR_CTRL_OUTMODE(kQTMR_SetOnCompare)); in QTMR_SetupPwm()
240 reg |= (TMR_CTRL_LENGTH_MASK | TMR_CTRL_OUTMODE(kQTMR_ClearOnCompare)); in QTMR_SetupPwm()
245 reg |= (TMR_CTRL_LENGTH_MASK | TMR_CTRL_OUTMODE(kQTMR_ToggleOnAltCompareReg)); in QTMR_SetupPwm()
248 base->CHANNEL[channel].CTRL = reg; in QTMR_SetupPwm()
283 uint16_t reg; in QTMR_SetupInputCapture() local
286 reg = base->CHANNEL[channel].CTRL & (uint16_t)(~TMR_CTRL_SCS_MASK); in QTMR_SetupInputCapture()
289 reg |= TMR_CTRL_SCS(capturePin); in QTMR_SetupInputCapture()
290 base->CHANNEL[channel].CTRL = reg; in QTMR_SetupInputCapture()
293 reg = base->CHANNEL[channel].SCTRL & in QTMR_SetupInputCapture()
296 reg |= (TMR_SCTRL_IPS(inputPolarity) | TMR_SCTRL_CAPTURE_MODE(captureMode)); in QTMR_SetupInputCapture()
297 base->CHANNEL[channel].SCTRL = reg; in QTMR_SetupInputCapture()
320 uint16_t reg; in QTMR_EnableInterrupts() local
322 reg = base->CHANNEL[channel].SCTRL; in QTMR_EnableInterrupts()
326 reg |= TMR_SCTRL_TCFIE_MASK; in QTMR_EnableInterrupts()
331 reg |= TMR_SCTRL_TOFIE_MASK; in QTMR_EnableInterrupts()
338 reg |= TMR_SCTRL_IEFIE_MASK; in QTMR_EnableInterrupts()
340 base->CHANNEL[channel].SCTRL = reg; in QTMR_EnableInterrupts()
342 reg = base->CHANNEL[channel].CSCTRL; in QTMR_EnableInterrupts()
346 reg |= TMR_CSCTRL_TCF1EN_MASK; in QTMR_EnableInterrupts()
351 reg |= TMR_CSCTRL_TCF2EN_MASK; in QTMR_EnableInterrupts()
353 base->CHANNEL[channel].CSCTRL = reg; in QTMR_EnableInterrupts()
366 uint16_t reg; in QTMR_DisableInterrupts() local
368 reg = base->CHANNEL[channel].SCTRL; in QTMR_DisableInterrupts()
372 reg &= (uint16_t)(~TMR_SCTRL_TCFIE_MASK); in QTMR_DisableInterrupts()
377 reg &= (uint16_t)(~TMR_SCTRL_TOFIE_MASK); in QTMR_DisableInterrupts()
382 reg &= (uint16_t)(~TMR_SCTRL_IEFIE_MASK); in QTMR_DisableInterrupts()
384 base->CHANNEL[channel].SCTRL = reg; in QTMR_DisableInterrupts()
386 reg = base->CHANNEL[channel].CSCTRL; in QTMR_DisableInterrupts()
390 reg &= ~(uint16_t)TMR_CSCTRL_TCF1EN_MASK; in QTMR_DisableInterrupts()
395 reg &= ~(uint16_t)TMR_CSCTRL_TCF2EN_MASK; in QTMR_DisableInterrupts()
397 base->CHANNEL[channel].CSCTRL = reg; in QTMR_DisableInterrupts()
412 uint16_t reg; in QTMR_GetEnabledInterrupts() local
414 reg = base->CHANNEL[channel].SCTRL; in QTMR_GetEnabledInterrupts()
416 if ((reg & TMR_SCTRL_TCFIE_MASK) != 0U) in QTMR_GetEnabledInterrupts()
421 if ((reg & TMR_SCTRL_TOFIE_MASK) != 0U) in QTMR_GetEnabledInterrupts()
426 if ((reg & TMR_SCTRL_IEFIE_MASK) != 0U) in QTMR_GetEnabledInterrupts()
431 reg = base->CHANNEL[channel].CSCTRL; in QTMR_GetEnabledInterrupts()
433 if ((reg & TMR_CSCTRL_TCF1EN_MASK) != 0U) in QTMR_GetEnabledInterrupts()
438 if ((reg & TMR_CSCTRL_TCF2EN_MASK) != 0U) in QTMR_GetEnabledInterrupts()
458 uint16_t reg; in QTMR_GetStatus() local
460 reg = base->CHANNEL[channel].SCTRL; in QTMR_GetStatus()
462 if ((reg & TMR_SCTRL_TCF_MASK) != 0U) in QTMR_GetStatus()
467 if ((reg & TMR_SCTRL_TOF_MASK) != 0U) in QTMR_GetStatus()
472 if ((reg & TMR_SCTRL_IEF_MASK) != 0U) in QTMR_GetStatus()
477 reg = base->CHANNEL[channel].CSCTRL; in QTMR_GetStatus()
479 if ((reg & TMR_CSCTRL_TCF1_MASK) != 0U) in QTMR_GetStatus()
484 if ((reg & TMR_CSCTRL_TCF2_MASK) != 0U) in QTMR_GetStatus()
502 uint16_t reg; in QTMR_ClearStatusFlags() local
504 reg = base->CHANNEL[channel].SCTRL; in QTMR_ClearStatusFlags()
508 reg &= (uint16_t)(~TMR_SCTRL_TCF_MASK); in QTMR_ClearStatusFlags()
513 reg &= (uint16_t)(~TMR_SCTRL_TOF_MASK); in QTMR_ClearStatusFlags()
518 reg &= (uint16_t)(~TMR_SCTRL_IEF_MASK); in QTMR_ClearStatusFlags()
520 base->CHANNEL[channel].SCTRL = reg; in QTMR_ClearStatusFlags()
522 reg = base->CHANNEL[channel].CSCTRL; in QTMR_ClearStatusFlags()
526 reg &= ~(uint16_t)TMR_CSCTRL_TCF1_MASK; in QTMR_ClearStatusFlags()
531 reg &= ~(uint16_t)TMR_CSCTRL_TCF2_MASK; in QTMR_ClearStatusFlags()
533 base->CHANNEL[channel].CSCTRL = reg; in QTMR_ClearStatusFlags()
609 uint16_t reg; in QTMR_EnableDma() local
611 reg = base->CHANNEL[channel].DMA; in QTMR_EnableDma()
617 reg |= TMR_DMA_IEFDE_MASK; in QTMR_EnableDma()
622 reg |= TMR_DMA_CMPLD1DE_MASK; in QTMR_EnableDma()
627 reg |= TMR_DMA_CMPLD2DE_MASK; in QTMR_EnableDma()
629 base->CHANNEL[channel].DMA = reg; in QTMR_EnableDma()
642 uint16_t reg; in QTMR_DisableDma() local
644 reg = base->CHANNEL[channel].DMA; in QTMR_DisableDma()
648 reg &= ~(uint16_t)TMR_DMA_IEFDE_MASK; in QTMR_DisableDma()
653 reg &= ~(uint16_t)TMR_DMA_CMPLD1DE_MASK; in QTMR_DisableDma()
658 reg &= ~(uint16_t)TMR_DMA_CMPLD2DE_MASK; in QTMR_DisableDma()
660 base->CHANNEL[channel].DMA = reg; in QTMR_DisableDma()
674 uint16_t reg = base->CHANNEL[channel].SCTRL; in QTMR_SetPwmOutputToIdle() local
681 if (0U != (reg & ((uint16_t)TMR_SCTRL_OPS_MASK))) in QTMR_SetPwmOutputToIdle()
684 reg |= (uint16_t)(TMR_SCTRL_FORCE_MASK | TMR_SCTRL_VAL(!idleStatus)); in QTMR_SetPwmOutputToIdle()
689 reg |= (uint16_t)(TMR_SCTRL_FORCE_MASK | TMR_SCTRL_VAL(idleStatus)); in QTMR_SetPwmOutputToIdle()
691 base->CHANNEL[channel].SCTRL = reg; in QTMR_SetPwmOutputToIdle()
720 uint16_t reg = base->CHANNEL[channel].CTRL; in QTMR_SetPwmClockMode() local
723 base->CHANNEL[channel].CTRL = reg & (uint16_t)(~TMR_CTRL_CM_MASK); in QTMR_SetPwmClockMode()
726 reg &= (uint16_t)(~(TMR_CTRL_PCS_MASK)); in QTMR_SetPwmClockMode()
727 reg |= TMR_CTRL_PCS(prescaler); in QTMR_SetPwmClockMode()
728 base->CHANNEL[channel].CTRL = reg; in QTMR_SetPwmClockMode()