Lines Matching refs:uint16_t

366uint16_t deadtimeValue;    /*!< The deadtime value; only used if channel pair is operating in comp…
584 …, pwm_submodule_t subModule, pwm_channels_t pwmSignal, pwm_mode_t currPwmMode, uint16_t dutyCycle);
613 uint16_t pulseCnt,
614 uint16_t dutyCycle);
737 uint16_t reg = base->SM[subModule].DMAEN; in PWM_DMAFIFOWatermarkControl()
740 reg &= ~((uint16_t)PWM_DMAEN_FAND_MASK); in PWM_DMAFIFOWatermarkControl()
744 reg |= ((uint16_t)PWM_DMAEN_FAND_MASK); in PWM_DMAFIFOWatermarkControl()
760 uint16_t reg = base->SM[subModule].DMAEN; in PWM_DMACaptureSourceSelect()
762 reg &= ~((uint16_t)PWM_DMAEN_CAPTDE_MASK); in PWM_DMACaptureSourceSelect()
763 …reg |= (((uint16_t)pwm_dma_source_select << (uint16_t)PWM_DMAEN_CAPTDE_SHIFT) & (uint16_t)PWM_DMAE… in PWM_DMACaptureSourceSelect()
777 static inline void PWM_EnableDMACapture(PWM_Type *base, pwm_submodule_t subModule, uint16_t mask, b… in PWM_EnableDMACapture()
779 uint16_t reg = base->SM[subModule].DMAEN; in PWM_EnableDMACapture()
782 reg |= (uint16_t)(mask); in PWM_EnableDMACapture()
786 reg &= ~((uint16_t)(mask)); in PWM_EnableDMACapture()
800 uint16_t reg = base->SM[subModule].DMAEN; in PWM_EnableDMAWrite()
803 reg |= ((uint16_t)PWM_DMAEN_VALDE_MASK); in PWM_EnableDMAWrite()
807 reg &= ~((uint16_t)PWM_DMAEN_VALDE_MASK); in PWM_EnableDMAWrite()
895 uint16_t value) in PWM_SetVALxValue()
931 static inline uint16_t PWM_GetVALxValue(PWM_Type *base, pwm_submodule_t subModule, pwm_value_regist… in PWM_GetVALxValue()
933 uint16_t temp = 0U; in PWM_GetVALxValue()
982 base->SM[subModule].TCTRL |= ((uint16_t)1U << (uint16_t)valueRegister); in PWM_OutputTriggerEnable()
986 base->SM[subModule].TCTRL &= ~((uint16_t)1U << (uint16_t)valueRegister); in PWM_OutputTriggerEnable()
1000 static inline void PWM_ActivateOutputTrigger(PWM_Type *base, pwm_submodule_t subModule, uint16_t va… in PWM_ActivateOutputTrigger()
1015 static inline void PWM_DeactivateOutputTrigger(PWM_Type *base, pwm_submodule_t subModule, uint16_t in PWM_DeactivateOutputTrigger()
1036 …((uint16_t)1U << (((uint16_t)subModule * (uint16_t)PWM_SUBMODULE_SWCONTROL_WIDTH) + (uint16_t)pwmC… in PWM_SetupSwCtrlOut()
1041 …~((uint16_t)1U << (((uint16_t)subModule * (uint16_t)PWM_SUBMODULE_SWCONTROL_WIDTH) + (uint16_t)pwm… in PWM_SetupSwCtrlOut()
1088 uint16_t reg = base->SM[subModule].OCTRL; in PWM_SetPwmFaultState()
1092 reg &= ~((uint16_t)PWM_OCTRL_PWMAFS_MASK); in PWM_SetPwmFaultState()
1093 …reg |= (((uint16_t)faultState << (uint16_t)PWM_OCTRL_PWMAFS_SHIFT) & (uint16_t)PWM_OCTRL_PWMAFS_MA… in PWM_SetPwmFaultState()
1096 reg &= ~((uint16_t)PWM_OCTRL_PWMBFS_MASK); in PWM_SetPwmFaultState()
1097 …reg |= (((uint16_t)faultState << (uint16_t)PWM_OCTRL_PWMBFS_SHIFT) & (uint16_t)PWM_OCTRL_PWMBFS_MA… in PWM_SetPwmFaultState()
1100 reg &= ~((uint16_t)PWM_OCTRL_PWMXFS_MASK); in PWM_SetPwmFaultState()
1101 …reg |= (((uint16_t)faultState << (uint16_t)PWM_OCTRL_PWMXFS_SHIFT) & (uint16_t)PWM_OCTRL_PWMXFS_MA… in PWM_SetPwmFaultState()
1129 uint16_t value) in PWM_SetupFaultDisableMap()
1131 uint16_t reg = base->SM[subModule].DISMAP[pwm_fault_channels]; in PWM_SetupFaultDisableMap()
1135 reg &= ~((uint16_t)PWM_DISMAP_DIS0A_MASK); in PWM_SetupFaultDisableMap()
1136 …reg |= (((uint16_t)(value) << (uint16_t)PWM_DISMAP_DIS0A_SHIFT) & (uint16_t)PWM_DISMAP_DIS0A_MASK); in PWM_SetupFaultDisableMap()
1139 reg &= ~((uint16_t)PWM_DISMAP_DIS0B_MASK); in PWM_SetupFaultDisableMap()
1140 …reg |= (((uint16_t)(value) << (uint16_t)PWM_DISMAP_DIS0B_SHIFT) & (uint16_t)PWM_DISMAP_DIS0B_MASK); in PWM_SetupFaultDisableMap()
1143 reg &= ~((uint16_t)PWM_DISMAP_DIS0X_MASK); in PWM_SetupFaultDisableMap()
1144 …reg |= (((uint16_t)(value) << (uint16_t)PWM_DISMAP_DIS0X_SHIFT) & (uint16_t)PWM_DISMAP_DIS0X_MASK); in PWM_SetupFaultDisableMap()
1168 … base->OUTEN |= ((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMA_EN_SHIFT + (uint16_t)subModule)); in PWM_OutputEnable()
1171 … base->OUTEN |= ((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMB_EN_SHIFT + (uint16_t)subModule)); in PWM_OutputEnable()
1174 … base->OUTEN |= ((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMX_EN_SHIFT + (uint16_t)subModule)); in PWM_OutputEnable()
1196 … base->OUTEN &= ~((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMA_EN_SHIFT + (uint16_t)subModule)); in PWM_OutputDisable()
1199 … base->OUTEN &= ~((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMB_EN_SHIFT + (uint16_t)subModule)); in PWM_OutputDisable()
1202 … base->OUTEN &= ~((uint16_t)1U << ((uint16_t)PWM_OUTEN_PWMX_EN_SHIFT + (uint16_t)subModule)); in PWM_OutputDisable()
1283 …eDelay(PWM_Type *base, pwm_channels_t pwmChannel, pwm_submodule_t subModule, uint16_t delayCycles);
1304 base->SM[subModule].CAPTFILTA &= ~((uint16_t)PWM_CAPTFILTA_CAPTA_FILT_CNT_MASK); in PWM_SetFilterSampleCount()
1310 base->SM[subModule].CAPTFILTB &= ~((uint16_t)PWM_CAPTFILTB_CAPTB_FILT_CNT_MASK); in PWM_SetFilterSampleCount()
1316 base->SM[subModule].CAPTFILTX &= ~((uint16_t)PWM_CAPTFILTX_CAPTX_FILT_CNT_MASK); in PWM_SetFilterSampleCount()
1343 base->SM[subModule].CAPTFILTA &= ~((uint16_t)PWM_CAPTFILTA_CAPTA_FILT_PER_MASK); in PWM_SetFilterSamplePeriod()
1349 base->SM[subModule].CAPTFILTB &= ~((uint16_t)PWM_CAPTFILTB_CAPTB_FILT_PER_MASK); in PWM_SetFilterSamplePeriod()
1355 base->SM[subModule].CAPTFILTX &= ~((uint16_t)PWM_CAPTFILTX_CAPTX_FILT_PER_MASK); in PWM_SetFilterSamplePeriod()