Lines Matching refs:uint16_t
67 static inline uint16_t PWM_GetComplementU16(uint16_t value) in PWM_GetComplementU16()
72 static inline uint16_t dutyCycleToReloadValue(uint8_t dutyCyclePercent) in dutyCycleToReloadValue()
104 …WM_SetPeriodRegister(PWM_Type *base, pwm_submodule_t subModule, pwm_mode_t mode, uint16_t pulseCnt) in PWM_SetPeriodRegister()
106 uint16_t modulo = 0; in PWM_SetPeriodRegister()
172 uint16_t pulseCnt, in PWM_SetDutycycleRegister()
173 uint16_t pwmHighPulse) in PWM_SetDutycycleRegister()
175 uint16_t modulo = 0; in PWM_SetDutycycleRegister()
270 uint16_t reg; in PWM_Init()
302 …~(uint16_t)(PWM_CTRL2_CLK_SEL_MASK | PWM_CTRL2_FORCE_SEL_MASK | PWM_CTRL2_INIT_SEL_MASK | PWM_CTRL… in PWM_Init()
321 base->MCTRL &= ~((uint16_t)1U << (PWM_MCTRL_IPOL_SHIFT + (uint16_t)subModule)); in PWM_Init()
324 base->MCTRL |= ((uint16_t)1U << (PWM_MCTRL_IPOL_SHIFT + (uint16_t)subModule)); in PWM_Init()
335 reg &= ~(uint16_t)(PWM_CTRL_PRSC_MASK | PWM_CTRL_LDFQ_MASK | PWM_CTRL_LDMOD_MASK); in PWM_Init()
346 reg &= (uint16_t)(~PWM_CTRL_FULL_MASK); in PWM_Init()
349 reg &= (uint16_t)(~PWM_CTRL_HALF_MASK); in PWM_Init()
364 …base->MASK &= (uint16_t)(~(uint16_t)(PWM_MASK_MASKX_MASK | PWM_MASK_MASKA_MASK | PWM_MASK_MASKB_MA… in PWM_Init()
367 base->MASK &= ~(uint16_t)(PWM_MASK_MASKX_MASK | PWM_MASK_MASKA_MASK | PWM_MASK_MASKB_MASK); in PWM_Init()
390 base->MCTRL &= ~((uint16_t)1U << (PWM_MCTRL_RUN_SHIFT + (uint16_t)subModule)); in PWM_Deinit()
484 uint16_t pulseCnt = 0, pwmHighPulse = 0; in PWM_SetupPwm()
498 pulseCnt = (uint16_t)(pwmClock / pwmFreq_Hz); in PWM_SetupPwm()
536 base->SM[subModule].OCTRL &= ~((uint16_t)PWM_OCTRL_PWMAFS_MASK); in PWM_SetupPwm()
537 …base->SM[subModule].OCTRL |= (((uint16_t)(chnlParams->faultState) << (uint16_t)PWM_OCTRL_PWMAFS_SH… in PWM_SetupPwm()
538 (uint16_t)PWM_OCTRL_PWMAFS_MASK); in PWM_SetupPwm()
541 base->SM[subModule].OCTRL &= ~((uint16_t)PWM_OCTRL_PWMBFS_MASK); in PWM_SetupPwm()
542 …base->SM[subModule].OCTRL |= (((uint16_t)(chnlParams->faultState) << (uint16_t)PWM_OCTRL_PWMBFS_SH… in PWM_SetupPwm()
543 (uint16_t)PWM_OCTRL_PWMBFS_MASK); in PWM_SetupPwm()
553 base->SM[subModule].OCTRL &= ~((uint16_t)1U << (uint16_t)polarityShift); in PWM_SetupPwm()
557 base->SM[subModule].OCTRL |= ((uint16_t)1U << (uint16_t)polarityShift); in PWM_SetupPwm()
562 base->OUTEN |= ((uint16_t)1U << ((uint16_t)outputEnableShift + (uint16_t)subModule)); in PWM_SetupPwm()
602 uint16_t pulseCnt = 0, pwmHighPulse = 0; in PWM_SetupPwmPhaseShift()
603 uint16_t modulo = 0; in PWM_SetupPwmPhaseShift()
604 uint16_t shift = 0; in PWM_SetupPwmPhaseShift()
610 pulseCnt = (uint16_t)(pwmClock / pwmFreq_Hz); in PWM_SetupPwmPhaseShift()
688 uint16_t reloadValue = dutyCycleToReloadValue(dutyCyclePercent); in PWM_UpdatePwmDutycycle()
709 …e, pwm_submodule_t subModule, pwm_channels_t pwmSignal, pwm_mode_t currPwmMode, uint16_t dutyCycle) in PWM_UpdatePwmDutycycleHighAccuracy()
712 uint16_t pulseCnt = 0, pwmHighPulse = 0; in PWM_UpdatePwmDutycycleHighAccuracy()
713 uint16_t modulo = 0; in PWM_UpdatePwmDutycycleHighAccuracy()
792 uint16_t pulseCnt, in PWM_UpdatePwmPeriodAndDutycycle()
793 uint16_t dutyCycle) in PWM_UpdatePwmPeriodAndDutycycle()
795 uint16_t pwmHighPulse = 0; in PWM_UpdatePwmPeriodAndDutycycle()
828 uint16_t reg = 0; in PWM_SetupInputCapture()
851 base->OUTEN &= ~((uint16_t)1U << (PWM_OUTEN_PWMA_EN_SHIFT + (uint16_t)subModule)); in PWM_SetupInputCapture()
874 base->OUTEN &= ~((uint16_t)1U << (PWM_OUTEN_PWMB_EN_SHIFT + (uint16_t)subModule)); in PWM_SetupInputCapture()
896 base->OUTEN &= ~((uint16_t)1U << (PWM_OUTEN_PWMX_EN_SHIFT + (uint16_t)subModule)); in PWM_SetupInputCapture()
918 base->FFILT &= ~(uint16_t)(PWM_FFILT_FILT_PER_MASK); in PWM_SetupFaultInputFilter()
921 base->FFILT = (uint16_t)(PWM_FFILT_FILT_PER(faultInputFilterParams->faultFilterPeriod) | in PWM_SetupFaultInputFilter()
938 uint16_t reg; in PWM_SetupFaults()
944 reg |= ((uint16_t)1U << (PWM_FCTRL_FLVL_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
948 reg &= ~((uint16_t)1U << (PWM_FCTRL_FLVL_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
951 if ((uint16_t)faultParams->faultClearingMode != 0U) in PWM_SetupFaults()
954 reg &= ~((uint16_t)1U << (PWM_FCTRL_FAUTO_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
958 reg |= ((uint16_t)1U << (PWM_FCTRL_FSAFE_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
963 reg &= ~((uint16_t)1U << (PWM_FCTRL_FSAFE_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
969 reg |= ((uint16_t)1U << (PWM_FCTRL_FAUTO_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
977 base->FCTRL2 &= ~((uint16_t)1U << (uint16_t)faultNum); in PWM_SetupFaults()
982 base->FCTRL2 |= ((uint16_t)1U << (uint16_t)faultNum); in PWM_SetupFaults()
987 reg &= ~(((uint16_t)1U << (PWM_FSTS_FFULL_SHIFT + (uint16_t)faultNum)) | in PWM_SetupFaults()
988 ((uint16_t)1U << (PWM_FSTS_FHALF_SHIFT + (uint16_t)faultNum))); in PWM_SetupFaults()
995 reg |= ((uint16_t)1U << (PWM_FSTS_FHALF_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
998 reg |= ((uint16_t)1U << (PWM_FSTS_FFULL_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
1001 reg |= ((uint16_t)1U << (PWM_FSTS_FHALF_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
1002 reg |= ((uint16_t)1U << (PWM_FSTS_FFULL_SHIFT + (uint16_t)faultNum)); in PWM_SetupFaults()
1054 uint16_t shift; in PWM_SetupForceSignal()
1055 uint16_t reg; in PWM_SetupForceSignal()
1058 shift = ((uint16_t)subModule * 4U) + ((uint16_t)pwmChannel * 2U); in PWM_SetupForceSignal()
1062 reg &= ~((uint16_t)0x3U << shift); in PWM_SetupForceSignal()
1063 reg |= (uint16_t)((uint16_t)mode << shift); in PWM_SetupForceSignal()
1078 base->SM[subModule].INTEN |= ((uint16_t)mask & 0xFFFFU); in PWM_EnableInterrupts()
1080 base->FCTRL |= ((uint16_t)(mask >> 16U) & PWM_FCTRL_FIE_MASK); in PWM_EnableInterrupts()
1093 base->SM[subModule].INTEN &= ~((uint16_t)mask & 0xFFFFU); in PWM_DisableInterrupts()
1094 base->FCTRL &= ~((uint16_t)(mask >> 16U) & PWM_FCTRL_FIE_MASK); in PWM_DisableInterrupts()
1144 uint16_t reg; in PWM_ClearStatusFlags()
1146 base->SM[subModule].STS = ((uint16_t)mask & 0xFFFFU); in PWM_ClearStatusFlags()
1151 reg &= ~(uint16_t)(PWM_FSTS_FFLAG_MASK); in PWM_ClearStatusFlags()
1152 reg |= (uint16_t)((mask >> 16U) & PWM_FSTS_FFLAG_MASK); in PWM_ClearStatusFlags()
1170 uint16_t valOn = 0, valOff = 0; in PWM_SetOutputToIdle()
1171 uint16_t ldmod; in PWM_SetOutputToIdle()
1273 uint16_t reg = base->SM[subModule].CTRL; in PWM_SetClockMode()
1281 reg &= ~(uint16_t)PWM_CTRL_PRSC_MASK; in PWM_SetClockMode()
1304 uint16_t reg = base->SM[subModule].CTRL2; in PWM_SetPwmForceOutputToZero()
1306 uint16_t mask; in PWM_SetPwmForceOutputToZero()
1337 base->SM[subModule].CTRL2 &= ~(uint16_t)PWM_CTRL2_FORCE_SEL_MASK; in PWM_SetPwmForceOutputToZero()
1358 uint16_t mask, swcout, sourceShift; in PWM_SetChannelOutput()
1359 uint16_t reg = base->SM[subModule].CTRL2; in PWM_SetChannelOutput()
1364 swcout = (uint16_t)PWM_SWCOUT_SM0OUT23_MASK << ((uint8_t)subModule * 2U); in PWM_SetChannelOutput()
1365 sourceShift = PWM_DTSRCSEL_SM0SEL23_SHIFT + ((uint16_t)subModule * 4U); in PWM_SetChannelOutput()
1370 swcout = (uint16_t)PWM_SWCOUT_SM0OUT45_MASK << ((uint8_t)subModule * 2U); in PWM_SetChannelOutput()
1371 sourceShift = PWM_DTSRCSEL_SM0SEL45_SHIFT + ((uint16_t)subModule * 4U); in PWM_SetChannelOutput()
1396 … (base->DTSRCSEL & ~(uint16_t)(0x3UL << sourceShift)) | (uint16_t)(0x2UL << sourceShift); in PWM_SetChannelOutput()
1402 … (base->DTSRCSEL & ~(uint16_t)(0x3UL << sourceShift)) | (uint16_t)(0x2UL << sourceShift); in PWM_SetChannelOutput()
1406 base->DTSRCSEL &= ~(uint16_t)(0x3UL << sourceShift); in PWM_SetChannelOutput()
1411 … (base->DTSRCSEL & ~(uint16_t)(0x3UL << sourceShift)) | (uint16_t)(0x1UL << sourceShift); in PWM_SetChannelOutput()
1417 base->SM[subModule].CTRL2 &= ~(uint16_t)PWM_CTRL2_FORCE_SEL_MASK; in PWM_SetChannelOutput()
1436 …seDelay(PWM_Type *base, pwm_channels_t pwmChannel, pwm_submodule_t subModule, uint16_t delayCycles) in PWM_SetPhaseDelay()
1439 uint16_t reg = base->SM[subModule].CTRL2; in PWM_SetPhaseDelay()
1482 reg = (reg & ~(uint16_t)PWM_CTRL2_INIT_SEL_MASK) | PWM_CTRL2_INIT_SEL(2); in PWM_SetPhaseDelay()