270     uint16_t reg;  in PWM_Init()  local
296     reg = base->SM[subModule].CTRL2;  in PWM_Init()
301     reg &=  in PWM_Init()
307     reg |= (PWM_CTRL2_CLK_SEL(config->clockSource) | PWM_CTRL2_FORCE_SEL(config->forceTrigger) |  in PWM_Init()
318             reg |= PWM_CTRL2_INDEP_MASK;  in PWM_Init()
330     base->SM[subModule].CTRL2 = reg;  in PWM_Init()
332     reg = base->SM[subModule].CTRL;  in PWM_Init()
335     reg &= ~(uint16_t)(PWM_CTRL_PRSC_MASK | PWM_CTRL_LDFQ_MASK | PWM_CTRL_LDMOD_MASK);  in PWM_Init()
336     reg |= (PWM_CTRL_PRSC(config->prescale) | PWM_CTRL_LDFQ(config->reloadFrequency));  in PWM_Init()
342             reg |= PWM_CTRL_LDMOD_MASK;  in PWM_Init()
345             reg |= PWM_CTRL_HALF_MASK;  in PWM_Init()
346             reg &= (uint16_t)(~PWM_CTRL_FULL_MASK);  in PWM_Init()
349             reg &= (uint16_t)(~PWM_CTRL_HALF_MASK);  in PWM_Init()
350             reg |= PWM_CTRL_FULL_MASK;  in PWM_Init()
353             reg |= PWM_CTRL_HALF_MASK;  in PWM_Init()
354             reg |= PWM_CTRL_FULL_MASK;  in PWM_Init()
360     base->SM[subModule].CTRL = reg;  in PWM_Init()
828     uint16_t reg = 0;  in PWM_SetupInputCapture()  local
834             reg = (PWM_CAPTCTRLA_INP_SELA(inputCaptureParams->captureInputSel) |  in PWM_SetupInputCapture()
841                 reg |= PWM_CAPTCTRLA_EDGCNTA_EN_MASK;  in PWM_SetupInputCapture()
844             reg |= PWM_CAPTCTRLA_ARMA_MASK;  in PWM_SetupInputCapture()
846             base->SM[subModule].CAPTCTRLA = reg;  in PWM_SetupInputCapture()
857             reg = (PWM_CAPTCTRLB_INP_SELB(inputCaptureParams->captureInputSel) |  in PWM_SetupInputCapture()
864                 reg |= PWM_CAPTCTRLB_EDGCNTB_EN_MASK;  in PWM_SetupInputCapture()
867             reg |= PWM_CAPTCTRLB_ARMB_MASK;  in PWM_SetupInputCapture()
869             base->SM[subModule].CAPTCTRLB = reg;  in PWM_SetupInputCapture()
879             reg = (PWM_CAPTCTRLX_INP_SELX(inputCaptureParams->captureInputSel) |  in PWM_SetupInputCapture()
886                 reg |= PWM_CAPTCTRLX_EDGCNTX_EN_MASK;  in PWM_SetupInputCapture()
889             reg |= PWM_CAPTCTRLX_ARMX_MASK;  in PWM_SetupInputCapture()
891             base->SM[subModule].CAPTCTRLX = reg;  in PWM_SetupInputCapture()
938     uint16_t reg;  in PWM_SetupFaults()  local
940     reg = base->FCTRL;  in PWM_SetupFaults()
944         reg |= ((uint16_t)1U << (PWM_FCTRL_FLVL_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
948         reg &= ~((uint16_t)1U << (PWM_FCTRL_FLVL_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
954         reg &= ~((uint16_t)1U << (PWM_FCTRL_FAUTO_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
958             reg |= ((uint16_t)1U << (PWM_FCTRL_FSAFE_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
963             reg &= ~((uint16_t)1U << (PWM_FCTRL_FSAFE_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
969         reg |= ((uint16_t)1U << (PWM_FCTRL_FAUTO_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
971     base->FCTRL = reg;  in PWM_SetupFaults()
986     reg = base->FSTS;  in PWM_SetupFaults()
987     reg &= ~(((uint16_t)1U << (PWM_FSTS_FFULL_SHIFT + (uint16_t)faultNum)) |  in PWM_SetupFaults()
995             reg |= ((uint16_t)1U << (PWM_FSTS_FHALF_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
998             reg |= ((uint16_t)1U << (PWM_FSTS_FFULL_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
1001             reg |= ((uint16_t)1U << (PWM_FSTS_FHALF_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
1002             reg |= ((uint16_t)1U << (PWM_FSTS_FFULL_SHIFT + (uint16_t)faultNum));  in PWM_SetupFaults()
1008     base->FSTS = reg;  in PWM_SetupFaults()
1055     uint16_t reg;  in PWM_SetupForceSignal()  local
1061     reg = base->DTSRCSEL;  in PWM_SetupForceSignal()
1062     reg &= ~((uint16_t)0x3U << shift);  in PWM_SetupForceSignal()
1063     reg |= (uint16_t)((uint16_t)mode << shift);  in PWM_SetupForceSignal()
1064     base->DTSRCSEL = reg;  in PWM_SetupForceSignal()
1144     uint16_t reg;  in PWM_ClearStatusFlags()  local
1147     reg                     = base->FSTS;  in PWM_ClearStatusFlags()
1151     reg &= ~(uint16_t)(PWM_FSTS_FFLAG_MASK);  in PWM_ClearStatusFlags()
1152     reg |= (uint16_t)((mask >> 16U) & PWM_FSTS_FFLAG_MASK);  in PWM_ClearStatusFlags()
1153     base->FSTS = reg;  in PWM_ClearStatusFlags()
1273     uint16_t reg = base->SM[subModule].CTRL;  in PWM_SetClockMode()  local
1281     reg &= ~(uint16_t)PWM_CTRL_PRSC_MASK;  in PWM_SetClockMode()
1282     reg |= PWM_CTRL_PRSC(prescaler);  in PWM_SetClockMode()
1283     base->SM[subModule].CTRL = reg;  in PWM_SetClockMode()
1289     base->SM[subModule].CTRL = reg;  in PWM_SetClockMode()
1304     uint16_t reg = base->SM[subModule].CTRL2;  in PWM_SetPwmForceOutputToZero()  local
1341     base->SM[subModule].CTRL2 = reg;  in PWM_SetPwmForceOutputToZero()
1359     uint16_t reg = base->SM[subModule].CTRL2;  in PWM_SetChannelOutput()  local
1421     base->SM[subModule].CTRL2 = reg;  in PWM_SetChannelOutput()
1439     uint16_t reg = base->SM[subModule].CTRL2;  in PWM_SetPhaseDelay()  local
1482     reg = (reg & ~(uint16_t)PWM_CTRL2_INIT_SEL_MASK) | PWM_CTRL2_INIT_SEL(2);  in PWM_SetPhaseDelay()
1488     base->SM[subModule].CTRL2 = reg;  in PWM_SetPhaseDelay()