68     uint32_t reg;  in SPC_GetPeriphIOIsolationStatus()  local
70     reg = base->SC;  in SPC_GetPeriphIOIsolationStatus()
71     return (uint8_t)((reg & SPC_SC_ISO_CLR_MASK) >> SPC_SC_ISO_CLR_SHIFT);  in SPC_GetPeriphIOIsolationStatus()
86     uint32_t reg;  in SPC_SetLowPowerRequestConfig()  local
88     reg = base->LPREQ_CFG;  in SPC_SetLowPowerRequestConfig()
89     reg &= ~(SPC_LPREQ_CFG_LPREQOE_MASK | SPC_LPREQ_CFG_LPREQPOL_MASK | SPC_LPREQ_CFG_LPREQOV_MASK);  in SPC_SetLowPowerRequestConfig()
93         reg |= SPC_LPREQ_CFG_LPREQOE_MASK | SPC_LPREQ_CFG_LPREQPOL((uint8_t)(config->polarity)) |  in SPC_SetLowPowerRequestConfig()
98         reg &= ~SPC_LPREQ_CFG_LPREQOE_MASK;  in SPC_SetLowPowerRequestConfig()
101     base->LPREQ_CFG = reg;  in SPC_SetLowPowerRequestConfig()
115     uint32_t reg;  in SPC_ConfigVddCoreGlitchDetector()  local
117     reg = (base->VDD_CORE_GLITCH_DETECT_SC) &  in SPC_ConfigVddCoreGlitchDetector()
121     reg |= SPC_VDD_CORE_GLITCH_DETECT_SC_CNT_SELECT(config->rippleCounterSelect) |  in SPC_ConfigVddCoreGlitchDetector()
126     base->VDD_CORE_GLITCH_DETECT_SC = reg;  in SPC_ConfigVddCoreGlitchDetector()
140     uint32_t reg = 0UL;  in SPC_SetSRAMOperateVoltage()  local
142     reg |= SPC_SRAMCTL_VSM(config->operateVoltage);  in SPC_SetSRAMOperateVoltage()
144     base->SRAMCTL = reg;  in SPC_SetSRAMOperateVoltage()
179     uint32_t reg;  in SPC_SetActiveModeBandgapModeConfig()  local
182     reg = base->ACTIVE_CFG;  in SPC_SetActiveModeBandgapModeConfig()
226     reg &= ~SPC_ACTIVE_CFG_BGMODE_MASK;  in SPC_SetActiveModeBandgapModeConfig()
227     reg |= SPC_ACTIVE_CFG_BGMODE(mode);  in SPC_SetActiveModeBandgapModeConfig()
229     base->ACTIVE_CFG = reg;  in SPC_SetActiveModeBandgapModeConfig()
255     uint32_t reg;  in SPC_SetLowPowerModeBandgapmodeConfig()  local
258     reg = base->LP_CFG;  in SPC_SetLowPowerModeBandgapmodeConfig()
299     reg &= ~SPC_LP_CFG_BGMODE_MASK;  in SPC_SetLowPowerModeBandgapmodeConfig()
300     reg |= SPC_LP_CFG_BGMODE(mode);  in SPC_SetLowPowerModeBandgapmodeConfig()
301     base->LP_CFG = reg;  in SPC_SetLowPowerModeBandgapmodeConfig()
321     uint32_t reg = 0UL;  in SPC_SetCoreVoltageDetectConfig()  local
324 …reg |= (config->option.HVDInterruptEnable) ? SPC_VD_CORE_CFG_HVDIE(1U) : SPC_VD_CORE_CFG_HVDIE(0U);  in SPC_SetCoreVoltageDetectConfig()
325     reg |= (config->option.HVDResetEnable) ? SPC_VD_CORE_CFG_HVDRE(1U) : SPC_VD_CORE_CFG_HVDRE(0U);  in SPC_SetCoreVoltageDetectConfig()
327 …reg |= (config->option.LVDInterruptEnable) ? SPC_VD_CORE_CFG_LVDIE(1U) : SPC_VD_CORE_CFG_LVDIE(0U);  in SPC_SetCoreVoltageDetectConfig()
328     reg |= (config->option.LVDResetEnable) ? SPC_VD_CORE_CFG_LVDRE(1U) : SPC_VD_CORE_CFG_LVDRE(0U);  in SPC_SetCoreVoltageDetectConfig()
330     base->VD_CORE_CFG = reg;  in SPC_SetCoreVoltageDetectConfig()
494     uint32_t reg = 0UL;  in SPC_SetSystemVoltageDetectConfig()  local
496 …  reg |= (config->option.HVDInterruptEnable) ? SPC_VD_SYS_CFG_HVDIE(1U) : SPC_VD_SYS_CFG_HVDIE(0U);  in SPC_SetSystemVoltageDetectConfig()
497 …  reg |= (config->option.LVDInterruptEnable) ? SPC_VD_SYS_CFG_LVDIE(1U) : SPC_VD_SYS_CFG_LVDIE(0U);  in SPC_SetSystemVoltageDetectConfig()
498     reg |= (config->option.HVDResetEnable) ? SPC_VD_SYS_CFG_HVDRE(1U) : SPC_VD_SYS_CFG_HVDRE(0U);  in SPC_SetSystemVoltageDetectConfig()
499     reg |= (config->option.LVDResetEnable) ? SPC_VD_SYS_CFG_LVDRE(1U) : SPC_VD_SYS_CFG_LVDRE(0U);  in SPC_SetSystemVoltageDetectConfig()
501     base->VD_SYS_CFG = reg;  in SPC_SetSystemVoltageDetectConfig()
639     uint32_t reg;  in SPC_SetIOVDDLowVoltageLevel()  local
641     reg = base->VD_IO_CFG;  in SPC_SetIOVDDLowVoltageLevel()
644     reg |= SPC_VD_IO_CFG_LVSEL(level);  in SPC_SetIOVDDLowVoltageLevel()
646     base->VD_IO_CFG = reg;  in SPC_SetIOVDDLowVoltageLevel()
664     uint32_t reg = 0UL;  in SPC_SetIOVoltageDetectConfig()  local
669     reg = base->VD_IO_CFG;  in SPC_SetIOVoltageDetectConfig()
670 …reg &= ~(SPC_VD_IO_CFG_LVDRE_MASK | SPC_VD_IO_CFG_LVDIE_MASK | SPC_VD_IO_CFG_HVDRE_MASK | SPC_VD_I…  in SPC_SetIOVoltageDetectConfig()
672     reg |= (config->option.HVDInterruptEnable) ? SPC_VD_IO_CFG_HVDIE(1U) : SPC_VD_IO_CFG_HVDIE(0U);  in SPC_SetIOVoltageDetectConfig()
673     reg |= (config->option.LVDInterruptEnable) ? SPC_VD_IO_CFG_LVDIE(1U) : SPC_VD_IO_CFG_LVDIE(0U);  in SPC_SetIOVoltageDetectConfig()
674     reg |= (config->option.HVDResetEnable) ? SPC_VD_IO_CFG_HVDRE(1U) : SPC_VD_IO_CFG_HVDRE(0U);  in SPC_SetIOVoltageDetectConfig()
675     reg |= (config->option.LVDResetEnable) ? SPC_VD_IO_CFG_LVDRE(1U) : SPC_VD_IO_CFG_LVDRE(0U);  in SPC_SetIOVoltageDetectConfig()
677     base->VD_IO_CFG = reg;  in SPC_SetIOVoltageDetectConfig()
810     uint32_t reg = 0UL;  in SPC_SetExternalVoltageDomainsConfig()  local
812     reg |= SPC_EVD_CFG_REG_EVDISO(IsoMask) | SPC_EVD_CFG_REG_EVDLPISO(lowPowerIsoMask);  in SPC_SetExternalVoltageDomainsConfig()
813     base->EVD_CFG = reg;  in SPC_SetExternalVoltageDomainsConfig()
1434     uint32_t reg;  in SPC_SetDCDCBurstConfig()  local
1435     reg = base->DCDC_CFG;  in SPC_SetDCDCBurstConfig()
1436     reg &= ~(SPC_DCDC_CFG_FREQ_CNTRL_MASK | SPC_DCDC_CFG_FREQ_CNTRL_ON_MASK);  in SPC_SetDCDCBurstConfig()
1437     reg |= SPC_DCDC_CFG_FREQ_CNTRL(config->freq);  in SPC_SetDCDCBurstConfig()
1438 …reg |= config->stabilizeBurstFreq ? SPC_DCDC_CFG_FREQ_CNTRL_ON(1U) : SPC_DCDC_CFG_FREQ_CNTRL_ON(0U…  in SPC_SetDCDCBurstConfig()
1439     base->DCDC_CFG = reg;  in SPC_SetDCDCBurstConfig()
1470     uint32_t reg;  in SPC_SetDCDCRefreshCount()  local
1472     reg = base->DCDC_BURST_CFG;  in SPC_SetDCDCRefreshCount()
1473     reg &= ~SPC_DCDC_BURST_CFG_PULSE_REFRESH_CNT_MASK;  in SPC_SetDCDCRefreshCount()
1474     reg |= SPC_DCDC_BURST_CFG_PULSE_REFRESH_CNT(count);  in SPC_SetDCDCRefreshCount()
1476     base->DCDC_BURST_CFG = reg;  in SPC_SetDCDCRefreshCount()