987 static inline void I3C_MasterEnableDMA(I3C_Type *base, bool enableTx, bool enableRx, uint32_t width)  in I3C_MasterEnableDMA()  argument
989     assert(width <= 2U);  in I3C_MasterEnableDMA()
991 …_DMAFB(enableRx ? 2U : 0U) | I3C_MDMACTRL_DMATB(enableTx ? 2U : 0U) | I3C_MDMACTRL_DMAWIDTH(width);  in I3C_MasterEnableDMA()
1001 static inline uint32_t I3C_MasterGetTxFifoAddress(I3C_Type *base, uint32_t width)  in I3C_MasterGetTxFifoAddress()  argument
1003     assert(width <= 2U);  in I3C_MasterGetTxFifoAddress()
1004     return (uint32_t)((width == 2U) ? &base->MWDATAH : &base->MWDATAB);  in I3C_MasterGetTxFifoAddress()
1014 static inline uint32_t I3C_MasterGetRxFifoAddress(I3C_Type *base, uint32_t width)  in I3C_MasterGetRxFifoAddress()  argument
1016     assert(width <= 2U);  in I3C_MasterGetRxFifoAddress()
1017     return (uint32_t)((width == 2U) ? &base->MRDATAH : &base->MRDATAB);  in I3C_MasterGetRxFifoAddress()
1673 static inline void I3C_SlaveEnableDMA(I3C_Type *base, bool enableTx, bool enableRx, uint32_t width)  in I3C_SlaveEnableDMA()  argument
1675     assert(width <= 2U);  in I3C_SlaveEnableDMA()
1677 …_DMAFB(enableRx ? 2U : 0U) | I3C_SDMACTRL_DMATB(enableTx ? 2U : 0U) | I3C_SDMACTRL_DMAWIDTH(width);  in I3C_SlaveEnableDMA()
1687 static inline uint32_t I3C_SlaveGetTxFifoAddress(I3C_Type *base, uint32_t width)  in I3C_SlaveGetTxFifoAddress()  argument
1689     assert(width <= 2U);  in I3C_SlaveGetTxFifoAddress()
1690     return (uint32_t)((width == 2U) ? &base->SWDATAH : &base->SWDATAB);  in I3C_SlaveGetTxFifoAddress()
1700 static inline uint32_t I3C_SlaveGetRxFifoAddress(I3C_Type *base, uint32_t width)  in I3C_SlaveGetRxFifoAddress()  argument
1702     assert(width <= 2U);  in I3C_SlaveGetRxFifoAddress()
1703     return (uint32_t)((width == 2U) ? &base->SRDATAH : &base->SRDATAB);  in I3C_SlaveGetRxFifoAddress()