Lines Matching refs:pConfig
878 void FLEXCAN_Init(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz) in FLEXCAN_Init() argument
881 assert(NULL != pConfig); in FLEXCAN_Init()
882 assert((pConfig->maxMbNum > 0U) && in FLEXCAN_Init()
883 … (pConfig->maxMbNum <= (uint8_t)FSL_FEATURE_FLEXCAN_HAS_MESSAGE_BUFFER_MAX_NUMBERn(base))); in FLEXCAN_Init()
890 flexcan_timing_config_t timingCfg = pConfig->timingConfig; in FLEXCAN_Init()
896 uint32_t tqFre = pConfig->bitRate * quantum; in FLEXCAN_Init()
900 assert((pConfig->bitRate != 0U) && (pConfig->bitRate <= 1000000U) && (tqFre <= sourceClock_Hz)); in FLEXCAN_Init()
954 … base->CTRL1 = (kFLEXCAN_ClkSrc0 == pConfig->clkSrc) ? (base->CTRL1 & ~CAN_CTRL1_CLKSRC_MASK) : in FLEXCAN_Init()
971 base->MECR = (pConfig->enableMemoryErrorControl) ? (base->MECR & ~CAN_MECR_ECCDIS_MASK) : in FLEXCAN_Init()
975 …base->MECR = (pConfig->enableNonCorrectableErrorEnterFreeze) ? (base->MECR | CAN_MECR_NCEFAFRZ_MAS… in FLEXCAN_Init()
988 …ctrl1Temp = (pConfig->enableLoopBack) ? (ctrl1Temp | CAN_CTRL1_LPB_MASK) : (ctrl1Temp & ~CAN_CTRL1… in FLEXCAN_Init()
991 …ctrl1Temp = (pConfig->enableTimerSync) ? (ctrl1Temp | CAN_CTRL1_TSYN_MASK) : (ctrl1Temp & ~CAN_CTR… in FLEXCAN_Init()
994 …ctrl1Temp = (pConfig->enableListenOnlyMode) ? ctrl1Temp | CAN_CTRL1_LOM_MASK : ctrl1Temp & ~CAN_CT… in FLEXCAN_Init()
998 …mcrTemp = (pConfig->enableSupervisorMode) ? mcrTemp | CAN_MCR_SUPV_MASK : mcrTemp & ~CAN_MCR_SUPV_… in FLEXCAN_Init()
1002 mcrTemp = (mcrTemp & ~CAN_MCR_MAXMB_MASK) | CAN_MCR_MAXMB((uint32_t)pConfig->maxMbNum - 1U); in FLEXCAN_Init()
1006 …mcrTemp = (pConfig->enableSelfWakeup) ? (mcrTemp | CAN_MCR_SLFWAK_MASK) : (mcrTemp & ~CAN_MCR_SLFW… in FLEXCAN_Init()
1009 mcrTemp = (kFLEXCAN_WakeupSrcFiltered == pConfig->wakeupSrc) ? (mcrTemp | CAN_MCR_WAKSRC_MASK) : in FLEXCAN_Init()
1014 …mcrTemp = (pConfig->enablePretendedeNetworking) ? ((mcrTemp & ~CAN_MCR_SLFWAK_MASK) | CAN_MCR_PNET… in FLEXCAN_Init()
1019 …mcrTemp = (pConfig->enableIndividMask) ? (mcrTemp | CAN_MCR_IRMQ_MASK) : (mcrTemp & ~CAN_MCR_IRMQ_… in FLEXCAN_Init()
1022 …mcrTemp = (pConfig->disableSelfReception) ? mcrTemp | CAN_MCR_SRXDIS_MASK : mcrTemp & ~CAN_MCR_SRX… in FLEXCAN_Init()
1028 … mcrTemp = (pConfig->enableDoze) ? (mcrTemp | CAN_MCR_DOZE_MASK) : (mcrTemp & ~CAN_MCR_DOZE_MASK); in FLEXCAN_Init()
1083 …CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz, flexcan_mb_size_t dataSi… in FLEXCAN_FDInit() argument
1086 …assert(((pConfig->bitRate < pConfig->bitRateFD) && brs) || ((pConfig->bitRate == pConfig->bitRateF… in FLEXCAN_FDInit()
1089 flexcan_timing_config_t timingCfg = pConfig->timingConfig; in FLEXCAN_FDInit()
1095 uint32_t tqFre = pConfig->bitRateFD * quantum; in FLEXCAN_FDInit()
1099 assert((pConfig->bitRateFD <= MAX_CANFD_BITRATE) && (tqFre <= sourceClock_Hz)); in FLEXCAN_FDInit()
1109 FLEXCAN_Init(base, pConfig, sourceClock_Hz); in FLEXCAN_FDInit()
1157 if (brs && !(pConfig->enableLoopBack)) in FLEXCAN_FDInit()
1161 if (((uint32_t)pConfig->timingConfig.fphaseSeg1 + pConfig->timingConfig.fpropSeg + 2U) * in FLEXCAN_FDInit()
1162 (pConfig->timingConfig.fpreDivider + 1U) < in FLEXCAN_FDInit()
1166 CAN_ETDC_ETDCEN_MASK | CAN_ETDC_TDMDIS(!pConfig->enableTransceiverDelayMeasure) | in FLEXCAN_FDInit()
1167 …CAN_ETDC_ETDCOFF(((uint32_t)pConfig->timingConfig.fphaseSeg1 + pConfig->timingConfig.fpropSeg + 2U… in FLEXCAN_FDInit()
1168 (pConfig->timingConfig.fpreDivider + 1U)); in FLEXCAN_FDInit()
1173 … base->ETDC = CAN_ETDC_ETDCEN_MASK | CAN_ETDC_TDMDIS(!pConfig->enableTransceiverDelayMeasure) | in FLEXCAN_FDInit()
1178 if (((uint32_t)pConfig->timingConfig.fphaseSeg1 + pConfig->timingConfig.fpropSeg + 2U) * in FLEXCAN_FDInit()
1179 (pConfig->timingConfig.fpreDivider + 1U) < in FLEXCAN_FDInit()
1184 …CAN_FDCTRL_TDCOFF(((uint32_t)pConfig->timingConfig.fphaseSeg1 + pConfig->timingConfig.fpropSeg + 2… in FLEXCAN_FDInit()
1185 (pConfig->timingConfig.fpreDivider + 1U)); in FLEXCAN_FDInit()
1260 void FLEXCAN_GetDefaultConfig(flexcan_config_t *pConfig) in FLEXCAN_GetDefaultConfig() argument
1263 assert(NULL != pConfig); in FLEXCAN_GetDefaultConfig()
1266 (void)memset(pConfig, 0, sizeof(*pConfig)); in FLEXCAN_GetDefaultConfig()
1269 pConfig->clkSrc = kFLEXCAN_ClkSrc0; in FLEXCAN_GetDefaultConfig()
1270 pConfig->bitRate = 1000000U; in FLEXCAN_GetDefaultConfig()
1272 pConfig->bitRateFD = 2000000U; in FLEXCAN_GetDefaultConfig()
1274 pConfig->maxMbNum = 16; in FLEXCAN_GetDefaultConfig()
1275 pConfig->enableLoopBack = false; in FLEXCAN_GetDefaultConfig()
1276 pConfig->enableTimerSync = true; in FLEXCAN_GetDefaultConfig()
1278 pConfig->enableSelfWakeup = false; in FLEXCAN_GetDefaultConfig()
1281 pConfig->wakeupSrc = kFLEXCAN_WakeupSrcUnfiltered; in FLEXCAN_GetDefaultConfig()
1283 pConfig->enableIndividMask = false; in FLEXCAN_GetDefaultConfig()
1284 pConfig->disableSelfReception = false; in FLEXCAN_GetDefaultConfig()
1285 pConfig->enableListenOnlyMode = false; in FLEXCAN_GetDefaultConfig()
1287 pConfig->enableSupervisorMode = true; in FLEXCAN_GetDefaultConfig()
1290 pConfig->enableDoze = false; in FLEXCAN_GetDefaultConfig()
1293 pConfig->enablePretendedeNetworking = false; in FLEXCAN_GetDefaultConfig()
1296 pConfig->enableMemoryErrorControl = true; in FLEXCAN_GetDefaultConfig()
1297 pConfig->enableNonCorrectableErrorEnterFreeze = true; in FLEXCAN_GetDefaultConfig()
1300 pConfig->enableTransceiverDelayMeasure = true; in FLEXCAN_GetDefaultConfig()
1307 pConfig->timingConfig.phaseSeg1 = 1; in FLEXCAN_GetDefaultConfig()
1308 pConfig->timingConfig.phaseSeg2 = 1; in FLEXCAN_GetDefaultConfig()
1309 pConfig->timingConfig.propSeg = 4; in FLEXCAN_GetDefaultConfig()
1310 pConfig->timingConfig.rJumpwidth = 1; in FLEXCAN_GetDefaultConfig()
1311 pConfig->timingConfig.fphaseSeg1 = 1; in FLEXCAN_GetDefaultConfig()
1312 pConfig->timingConfig.fphaseSeg2 = 1; in FLEXCAN_GetDefaultConfig()
1313 pConfig->timingConfig.fpropSeg = 0; in FLEXCAN_GetDefaultConfig()
1314 pConfig->timingConfig.frJumpwidth = 1; in FLEXCAN_GetDefaultConfig()
1316 pConfig->timingConfig.phaseSeg1 = 1; in FLEXCAN_GetDefaultConfig()
1317 pConfig->timingConfig.phaseSeg2 = 1; in FLEXCAN_GetDefaultConfig()
1318 pConfig->timingConfig.propSeg = 4; in FLEXCAN_GetDefaultConfig()
1319 pConfig->timingConfig.rJumpwidth = 1; in FLEXCAN_GetDefaultConfig()
1332 void FLEXCAN_SetPNConfig(CAN_Type *base, const flexcan_pn_config_t *pConfig) in FLEXCAN_SetPNConfig() argument
1335 assert(NULL != pConfig); in FLEXCAN_SetPNConfig()
1336 assert(0U != pConfig->matchNum); in FLEXCAN_SetPNConfig()
1340 pnctrl = (pConfig->matchNum > 1U) ? CAN_CTRL1_PN_FCS(0x2U | (uint32_t)pConfig->matchSrc) : in FLEXCAN_SetPNConfig()
1341 CAN_CTRL1_PN_FCS(pConfig->matchSrc); in FLEXCAN_SetPNConfig()
1342 pnctrl |= (pConfig->enableMatch) ? (CAN_CTRL1_PN_WUMF_MSK_MASK) : 0U; in FLEXCAN_SetPNConfig()
1343 pnctrl |= (pConfig->enableTimeout) ? (CAN_CTRL1_PN_WTOF_MSK_MASK) : 0U; in FLEXCAN_SetPNConfig()
1344 pnctrl |= CAN_CTRL1_PN_NMATCH(pConfig->matchNum) | CAN_CTRL1_PN_IDFS(pConfig->idMatchMode) | in FLEXCAN_SetPNConfig()
1345 CAN_CTRL1_PN_PLFS(pConfig->dataMatchMode); in FLEXCAN_SetPNConfig()
1347 base->CTRL2_PN = CAN_CTRL2_PN_MATCHTO(pConfig->timeoutValue); in FLEXCAN_SetPNConfig()
1348 base->FLT_ID1 = pConfig->idLower; in FLEXCAN_SetPNConfig()
1349 base->FLT_ID2_IDMASK = pConfig->idUpper; in FLEXCAN_SetPNConfig()
1350 …base->FLT_DLC = CAN_FLT_DLC_FLT_DLC_LO(pConfig->lengthLower) | CAN_FLT_DLC_FLT_DLC_HI(pConf… in FLEXCAN_SetPNConfig()
1351 base->PL1_LO = pConfig->lowerWord0; in FLEXCAN_SetPNConfig()
1352 base->PL1_HI = pConfig->lowerWord1; in FLEXCAN_SetPNConfig()
1353 base->PL2_PLMASK_LO = pConfig->upperWord0; in FLEXCAN_SetPNConfig()
1354 base->PL2_PLMASK_HI = pConfig->upperWord1; in FLEXCAN_SetPNConfig()
1437 void FLEXCAN_SetTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig) in FLEXCAN_SetTimingConfig() argument
1440 assert(NULL != pConfig); in FLEXCAN_SetTimingConfig()
1453 … base->EPRS = (base->EPRS & (~CAN_EPRS_ENPRESDIV_MASK)) | CAN_EPRS_ENPRESDIV(pConfig->preDivider); in FLEXCAN_SetTimingConfig()
1454 base->ENCBT = CAN_ENCBT_NRJW(pConfig->rJumpwidth) | in FLEXCAN_SetTimingConfig()
1455 CAN_ENCBT_NTSEG1((uint32_t)pConfig->phaseSeg1 + pConfig->propSeg + 1U) | in FLEXCAN_SetTimingConfig()
1456 CAN_ENCBT_NTSEG2(pConfig->phaseSeg2); in FLEXCAN_SetTimingConfig()
1464 …base->CBT = CAN_CBT_BTF_MASK | CAN_CBT_EPRESDIV(pConfig->preDivider) | CAN_CBT_ERJW(pConfig->rJump… in FLEXCAN_SetTimingConfig()
1465 CAN_CBT_EPSEG1(pConfig->phaseSeg1) | CAN_CBT_EPSEG2(pConfig->phaseSeg2) | in FLEXCAN_SetTimingConfig()
1466 CAN_CBT_EPROPSEG(pConfig->propSeg); in FLEXCAN_SetTimingConfig()
1468 } while ((CAN_CBT_EPRESDIV(pConfig->preDivider) | CAN_CBT_ERJW(pConfig->rJumpwidth) | in FLEXCAN_SetTimingConfig()
1469 CAN_CBT_EPSEG1(pConfig->phaseSeg1) | CAN_CBT_EPSEG2(pConfig->phaseSeg2) | in FLEXCAN_SetTimingConfig()
1470 CAN_CBT_EPROPSEG(pConfig->propSeg)) != in FLEXCAN_SetTimingConfig()
1482 … base->CTRL1 |= (CAN_CTRL1_PRESDIV(pConfig->preDivider) | CAN_CTRL1_RJW(pConfig->rJumpwidth) | in FLEXCAN_SetTimingConfig()
1483 CAN_CTRL1_PSEG1(pConfig->phaseSeg1) | CAN_CTRL1_PSEG2(pConfig->phaseSeg2) | in FLEXCAN_SetTimingConfig()
1484 CAN_CTRL1_PROPSEG(pConfig->propSeg)); in FLEXCAN_SetTimingConfig()
1492 base->CTRL1 |= (CAN_CTRL1_PRESDIV(pConfig->preDivider) | CAN_CTRL1_RJW(pConfig->rJumpwidth) | in FLEXCAN_SetTimingConfig()
1493 CAN_CTRL1_PSEG1(pConfig->phaseSeg1) | CAN_CTRL1_PSEG2(pConfig->phaseSeg2) | in FLEXCAN_SetTimingConfig()
1494 CAN_CTRL1_PROPSEG(pConfig->propSeg)); in FLEXCAN_SetTimingConfig()
1516 void FLEXCAN_SetFDTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig) in FLEXCAN_SetFDTimingConfig() argument
1519 assert(NULL != pConfig); in FLEXCAN_SetFDTimingConfig()
1528 …base->EPRS = (base->EPRS & (~CAN_EPRS_EDPRESDIV_MASK)) | CAN_EPRS_EDPRESDIV(pConfig->fpreDivider); in FLEXCAN_SetFDTimingConfig()
1529 base->EDCBT = CAN_EDCBT_DRJW(pConfig->frJumpwidth) | CAN_EDCBT_DTSEG2(pConfig->fphaseSeg2) | in FLEXCAN_SetFDTimingConfig()
1530 CAN_EDCBT_DTSEG1((uint32_t)pConfig->fphaseSeg1 + pConfig->fpropSeg); in FLEXCAN_SetFDTimingConfig()
1540 … base->FDCBT = (CAN_FDCBT_FPRESDIV(pConfig->fpreDivider) | CAN_FDCBT_FRJW(pConfig->frJumpwidth) | in FLEXCAN_SetFDTimingConfig()
1541 … CAN_FDCBT_FPSEG1(pConfig->fphaseSeg1) | CAN_FDCBT_FPSEG2(pConfig->fphaseSeg2) | in FLEXCAN_SetFDTimingConfig()
1542 CAN_FDCBT_FPROPSEG(pConfig->fpropSeg)); in FLEXCAN_SetFDTimingConfig()
1543 } while ((CAN_FDCBT_FPRESDIV(pConfig->fpreDivider) | CAN_FDCBT_FRJW(pConfig->frJumpwidth) | in FLEXCAN_SetFDTimingConfig()
1544 CAN_FDCBT_FPSEG1(pConfig->fphaseSeg1) | CAN_FDCBT_FPSEG2(pConfig->fphaseSeg2) | in FLEXCAN_SetFDTimingConfig()
1545 CAN_FDCBT_FPROPSEG(pConfig->fpropSeg)) != in FLEXCAN_SetFDTimingConfig()
2551 …EnhancedRxFifoConfig(CAN_Type *base, const flexcan_enhanced_rx_fifo_config_t *pConfig, bool enable) in FLEXCAN_SetEnhancedRxFifoConfig() argument
2554 assert((NULL != pConfig) || (false == enable)); in FLEXCAN_SetEnhancedRxFifoConfig()
2563 assert((((uint32_t)pConfig->idFilterPairNum * 2UL) < in FLEXCAN_SetEnhancedRxFifoConfig()
2565 … (pConfig->extendIdFilterNum <= pConfig->idFilterPairNum) && (0UL != pConfig->idFilterPairNum)); in FLEXCAN_SetEnhancedRxFifoConfig()
2568 assert(pConfig->fifoWatermark < (uint32_t)FSL_FEATURE_FLEXCAN_HAS_ENHANCED_RX_FIFO_SIZE); in FLEXCAN_SetEnhancedRxFifoConfig()
2577 …base->ERFCR = CAN_ERFCR_DMALW(pConfig->dmaPerReadLength) | CAN_ERFCR_NEXIF(pConfig->extendIdFilter… in FLEXCAN_SetEnhancedRxFifoConfig()
2578 … CAN_ERFCR_NFE((uint32_t)pConfig->idFilterPairNum - 1UL) | CAN_ERFCR_ERFWM(pConfig->fifoWatermark); in FLEXCAN_SetEnhancedRxFifoConfig()
2582 …base->ERFFEL[i] = (i < ((uint32_t)pConfig->idFilterPairNum * 2U)) ? pConfig->idFilterTable[i] : 0x… in FLEXCAN_SetEnhancedRxFifoConfig()
2586 …base->CTRL2 = (pConfig->priority == kFLEXCAN_RxFifoPrioHigh) ? (base->CTRL2 & ~CAN_CTRL2_MRP_MASK)… in FLEXCAN_SetEnhancedRxFifoConfig()