105     base->TCD[channel].CSR           = 0;  in EDMA_InstallTCD()
106     base->TCD[channel].CSR           = tcd->CSR;  in EDMA_InstallTCD()
350 …base->TCD[channel].CSR = (uint16_t)((base->TCD[channel].CSR & (~DMA_CSR_BWC_MASK)) | DMA_CSR_BWC(b…  in EDMA_SetBandWidth()
396         base->TCD[channel].CSR |= DMA_CSR_INTMAJOR_MASK;  in EDMA_EnableChannelInterrupts()
402         base->TCD[channel].CSR |= DMA_CSR_INTHALF_MASK;  in EDMA_EnableChannelInterrupts()
427         base->TCD[channel].CSR &= ~(uint16_t)DMA_CSR_INTMAJOR_MASK;  in EDMA_DisableChannelInterrupts()
433         base->TCD[channel].CSR &= ~(uint16_t)DMA_CSR_INTHALF_MASK;  in EDMA_DisableChannelInterrupts()
461     tcd->CSR   = DMA_CSR_DREQ(1U);  in EDMA_TcdReset()
540         tcd->CSR = (tcd->CSR | (uint16_t)DMA_CSR_ESG_MASK) & ~(uint16_t)DMA_CSR_DREQ_MASK;  in EDMA_TcdSetTransferConfig()
627         tcd->CSR |= DMA_CSR_MAJORELINK_MASK;  in EDMA_TcdSetChannelLink()
629         tmpreg   = tcd->CSR & (~(uint16_t)DMA_CSR_MAJORLINKCH_MASK);  in EDMA_TcdSetChannelLink()
630         tcd->CSR = tmpreg | DMA_CSR_MAJORLINKCH(linkedChannel);  in EDMA_TcdSetChannelLink()
636         tcd->CSR &= ~(uint16_t)DMA_CSR_MAJORELINK_MASK;  in EDMA_TcdSetChannelLink()
676         tcd->CSR |= DMA_CSR_INTMAJOR_MASK;  in EDMA_TcdEnableInterrupts()
682         tcd->CSR |= DMA_CSR_INTHALF_MASK;  in EDMA_TcdEnableInterrupts()
700         tcd->CSR &= ~(uint16_t)DMA_CSR_INTMAJOR_MASK;  in EDMA_TcdDisableInterrupts()
706         tcd->CSR &= ~(uint16_t)DMA_CSR_INTHALF_MASK;  in EDMA_TcdDisableInterrupts()
737     if (0U != (DMA_CSR_DONE_MASK & base->TCD[channel].CSR))  in EDMA_GetRemainingMajorLoopCount()
774     retval |= (((uint32_t)base->TCD[channel].CSR & DMA_CSR_DONE_MASK) >> DMA_CSR_DONE_SHIFT);  in EDMA_GetChannelStatusFlags()
880     tcdRegs->CSR       = 0;  in EDMA_CreateHandle()
1127         if (((handle->base->TCD[handle->channel].CSR & DMA_CSR_ACTIVE_MASK) != 0U) ||  in EDMA_SubmitTransfer()
1137             handle->base->TCD[handle->channel].CSR |= DMA_CSR_DREQ_MASK;  in EDMA_SubmitTransfer()
1139             handle->base->TCD[handle->channel].CSR |= DMA_CSR_INTMAJOR_MASK;  in EDMA_SubmitTransfer()
1181         handle->tcdPool[currentTcd].CSR |= DMA_CSR_INTMAJOR_MASK;  in EDMA_SubmitTransfer()
1193             csr = handle->tcdPool[previousTcd].CSR | ((uint16_t)DMA_CSR_ESG_MASK);  in EDMA_SubmitTransfer()
1195             handle->tcdPool[previousTcd].CSR = csr;  in EDMA_SubmitTransfer()
1210                 tcdRegs->CSR |= DMA_CSR_DREQ_MASK;  in EDMA_SubmitTransfer()
1212                 csr = tcdRegs->CSR | DMA_CSR_ESG_MASK;  in EDMA_SubmitTransfer()
1214                 tcdRegs->CSR = csr;  in EDMA_SubmitTransfer()
1225                 if (0U != (tcdRegs->CSR & DMA_CSR_ESG_MASK))  in EDMA_SubmitTransfer()
1227                     tcdRegs->CSR &= ~(uint16_t)DMA_CSR_DREQ_MASK;  in EDMA_SubmitTransfer()
1306                 tmpCSR = tcdRegs->CSR;  in EDMA_StartTransfer()
1353     handle->base->TCD[handle->channel].CSR = 0;  in EDMA_AbortTransfer()
1407     transfer_done = ((handle->base->TCD[handle->channel].CSR & DMA_CSR_DONE_MASK) != 0U);  in EDMA_HandleIRQ()
1422         bool esg = ((handle->base->TCD[handle->channel].CSR & DMA_CSR_ESG_MASK) != 0U);  in EDMA_HandleIRQ()
1503             if ((handle->base->TCD[handle->channel].CSR & DMA_CSR_ESG_MASK) != 0U)  in EDMA_HandleIRQ()