Lines Matching refs:ctarConfig
232 …if (0U == DSPI_MasterSetBaudRate(base, masterConfig->whichCtar, masterConfig->ctarConfig.baudRate,… in DSPI_MasterInit()
240 …base->CTAR[masterConfig->whichCtar] = temp | SPI_CTAR_FMSZ(masterConfig->ctarConfig.bitsPerFrame -… in DSPI_MasterInit()
241 SPI_CTAR_CPOL(masterConfig->ctarConfig.cpol) | in DSPI_MasterInit()
242 SPI_CTAR_CPHA(masterConfig->ctarConfig.cpha) | in DSPI_MasterInit()
243 SPI_CTAR_LSBFE(masterConfig->ctarConfig.direction); in DSPI_MasterInit()
246 masterConfig->ctarConfig.pcsToSckDelayInNanoSec); in DSPI_MasterInit()
248 masterConfig->ctarConfig.lastSckToPcsDelayInNanoSec); in DSPI_MasterInit()
250 masterConfig->ctarConfig.betweenTransferDelayInNanoSec); in DSPI_MasterInit()
277 masterConfig->ctarConfig.baudRate = 500000; in DSPI_MasterGetDefaultConfig()
278 masterConfig->ctarConfig.bitsPerFrame = 8; in DSPI_MasterGetDefaultConfig()
279 masterConfig->ctarConfig.cpol = kDSPI_ClockPolarityActiveHigh; in DSPI_MasterGetDefaultConfig()
280 masterConfig->ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge; in DSPI_MasterGetDefaultConfig()
281 masterConfig->ctarConfig.direction = kDSPI_MsbFirst; in DSPI_MasterGetDefaultConfig()
283 masterConfig->ctarConfig.pcsToSckDelayInNanoSec = 1000; in DSPI_MasterGetDefaultConfig()
284 masterConfig->ctarConfig.lastSckToPcsDelayInNanoSec = 1000; in DSPI_MasterGetDefaultConfig()
285 masterConfig->ctarConfig.betweenTransferDelayInNanoSec = 1000; in DSPI_MasterGetDefaultConfig()
346 …base->CTAR[slaveConfig->whichCtar] = temp | SPI_CTAR_SLAVE_FMSZ(slaveConfig->ctarConfig.bitsPerFra… in DSPI_SlaveInit()
347 SPI_CTAR_SLAVE_CPOL(slaveConfig->ctarConfig.cpol) | in DSPI_SlaveInit()
348 SPI_CTAR_SLAVE_CPHA(slaveConfig->ctarConfig.cpha); in DSPI_SlaveInit()
378 slaveConfig->ctarConfig.bitsPerFrame = 8; in DSPI_SlaveGetDefaultConfig()
379 slaveConfig->ctarConfig.cpol = kDSPI_ClockPolarityActiveHigh; in DSPI_SlaveGetDefaultConfig()
380 slaveConfig->ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge; in DSPI_SlaveGetDefaultConfig()