140     base->CH[channel].TCD_CSR           = tcd->CSR;  in EDMA_InstallTCD()
488     tcd->CSR   = DMA_TCD_CSR_DREQ(1U);  in EDMA_TcdReset()
570         tcd->CSR = (tcd->CSR | (uint16_t)DMA_TCD_CSR_ESG_MASK) & ~(uint16_t)DMA_TCD_CSR_DREQ_MASK;  in EDMA_TcdSetTransferConfig()
644         tcd->CSR |= DMA_TCD_CSR_MAJORELINK_MASK;  in EDMA_TcdSetChannelLink()
646         tmpreg   = tcd->CSR & (~(uint16_t)DMA_TCD_CSR_MAJORLINKCH_MASK);  in EDMA_TcdSetChannelLink()
647         tcd->CSR = tmpreg | DMA_TCD_CSR_MAJORLINKCH(linkedChannel);  in EDMA_TcdSetChannelLink()
653         tcd->CSR &= ~(uint16_t)DMA_TCD_CSR_MAJORELINK_MASK;  in EDMA_TcdSetChannelLink()
695         tcd->CSR |= DMA_TCD_CSR_INTMAJOR_MASK;  in EDMA_TcdEnableInterrupts()
701         tcd->CSR |= DMA_TCD_CSR_INTHALF_MASK;  in EDMA_TcdEnableInterrupts()
719         tcd->CSR &= ~(uint16_t)DMA_TCD_CSR_INTMAJOR_MASK;  in EDMA_TcdDisableInterrupts()
725         tcd->CSR &= ~(uint16_t)DMA_TCD_CSR_INTHALF_MASK;  in EDMA_TcdDisableInterrupts()
1176         handle->tcdPool[currentTcd].CSR |= DMA_TCD_CSR_INTMAJOR_MASK;  in EDMA_SubmitTransfer()
1191 …(handle->tcdPool[previousTcd].CSR | (uint16_t)DMA_TCD_CSR_ESG_MASK) & ~(uint16_t)DMA_TCD_CSR_DREQ_…  in EDMA_SubmitTransfer()
1192             handle->tcdPool[previousTcd].CSR = csr;  in EDMA_SubmitTransfer()
1210 …          csr = (tcdRegs->CSR | (uint16_t)DMA_TCD_CSR_ESG_MASK) & ~(uint16_t)DMA_TCD_CSR_DREQ_MASK;  in EDMA_SubmitTransfer()
1213                 tcdRegs->CSR = csr;  in EDMA_SubmitTransfer()
1230                 if ((tcdRegs->CSR & DMA_TCD_CSR_ESG_MASK) != 0U)  in EDMA_SubmitTransfer()
1333                     ((tcdRegs->CSR & DMA_TCD_CSR_ESG_MASK) != 0u))  in EDMA_StartTransfer()