192                          ctimer_match_t matchChannel,  in CTIMER_SetupPwm()  argument
205     if (matchChannel == pwmPeriodChannel)  in CTIMER_SetupPwm()
211     base->PWMC |= (1UL << (uint32_t)matchChannel);  in CTIMER_SetupPwm()
217           << ((uint32_t)matchChannel * 3U));  in CTIMER_SetupPwm()
222 …g |= (((uint32_t)CTIMER_MCR_MR0I_MASK) << (CTIMER_MCR_MR0I_SHIFT + ((uint32_t)matchChannel * 3U)));  in CTIMER_SetupPwm()
247     base->MR[matchChannel] = pulsePeriod;  in CTIMER_SetupPwm()
249     CTIMER_ClearStatusFlags(base, ((uint32_t)CTIMER_IR_MR0INT_MASK) << (uint32_t)matchChannel);  in CTIMER_SetupPwm()
282                                ctimer_match_t matchChannel,  in CTIMER_SetupPwmPeriod()  argument
295     if (matchChannel == pwmPeriodChannel)  in CTIMER_SetupPwmPeriod()
301     base->PWMC |= (1UL << (uint32_t)matchChannel);  in CTIMER_SetupPwmPeriod()
307           << ((uint32_t)matchChannel * 3U));  in CTIMER_SetupPwmPeriod()
312 …g |= (((uint32_t)CTIMER_MCR_MR0I_MASK) << (CTIMER_MCR_MR0I_SHIFT + ((uint32_t)matchChannel * 3U)));  in CTIMER_SetupPwmPeriod()
324     base->MR[matchChannel] = pulsePeriod;  in CTIMER_SetupPwmPeriod()
326     CTIMER_ClearStatusFlags(base, ((uint32_t)CTIMER_IR_MR0INT_MASK) << (uint32_t)matchChannel);  in CTIMER_SetupPwmPeriod()
349                                ctimer_match_t matchChannel,  in CTIMER_UpdatePwmDutycycle()  argument
368     base->MR[matchChannel] = pulsePeriod;  in CTIMER_UpdatePwmDutycycle()
380 void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t …  in CTIMER_SetupMatch()  argument
393           << ((uint32_t)matchChannel * 3U));  in CTIMER_SetupMatch()
394 …(uint32_t)(config->enableCounterReset) << (CTIMER_MCR_MR0R_SHIFT + ((uint32_t)matchChannel * 3U)));  in CTIMER_SetupMatch()
395 …((uint32_t)(config->enableCounterStop) << (CTIMER_MCR_MR0S_SHIFT + ((uint32_t)matchChannel * 3U)));  in CTIMER_SetupMatch()
396 …reg |= ((uint32_t)(config->enableInterrupt) << (CTIMER_MCR_MR0I_SHIFT + ((uint32_t)matchChannel * …  in CTIMER_SetupMatch()
401     reg &= ~(((uint32_t)CTIMER_EMR_EMC0_MASK) << ((uint32_t)matchChannel * 2U));  in CTIMER_SetupMatch()
402 …  reg |= ((uint32_t)config->outControl) << (CTIMER_EMR_EMC0_SHIFT + ((uint32_t)matchChannel * 2U));  in CTIMER_SetupMatch()
405     reg &= ~(((uint32_t)CTIMER_EMR_EM0_MASK) << (uint32_t)matchChannel);  in CTIMER_SetupMatch()
406     reg |= ((uint32_t)config->outPinInitState) << (uint32_t)matchChannel;  in CTIMER_SetupMatch()
410     base->MR[matchChannel] = config->matchValue;  in CTIMER_SetupMatch()
412     CTIMER_ClearStatusFlags(base, ((uint32_t)CTIMER_IR_MR0INT_MASK) << (uint32_t)matchChannel);  in CTIMER_SetupMatch()
433 uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)  in CTIMER_GetOutputMatchStatus()  argument
435     return (base->EMR & matchChannel);  in CTIMER_GetOutputMatchStatus()