Lines Matching refs:MCG

67 #define MCG_S_IRCST_VAL ((MCG->S & MCG_S_IRCST_MASK) >> MCG_S_IRCST_SHIFT)
68 #define MCG_S_CLKST_VAL ((MCG->S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT)
69 #define MCG_S_IREFST_VAL ((MCG->S & MCG_S_IREFST_MASK) >> MCG_S_IREFST_SHIFT)
70 #define MCG_S_PLLST_VAL ((MCG->S & MCG_S_PLLST_MASK) >> MCG_S_PLLST_SHIFT)
71 #define MCG_C1_FRDIV_VAL ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT)
72 #define MCG_C2_LP_VAL ((MCG->C2 & MCG_C2_LP_MASK) >> MCG_C2_LP_SHIFT)
73 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
74 #define MCG_SC_FCRDIV_VAL ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT)
75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
76 #define MCG_C7_OSCSEL_VAL ((MCG->C7 & MCG_C7_OSCSEL_MASK) >> MCG_C7_OSCSEL_SHIFT)
77 #define MCG_C4_DMX32_VAL ((MCG->C4 & MCG_C4_DMX32_MASK) >> MCG_C4_DMX32_SHIFT)
78 #define MCG_C4_DRST_DRS_VAL ((MCG->C4 & MCG_C4_DRST_DRS_MASK) >> MCG_C4_DRST_DRS_SHIFT)
79 #define MCG_C7_PLL32KREFSEL_VAL ((MCG->C7 & MCG_C7_PLL32KREFSEL_MASK) >> MCG_C7_PLL32KREFSEL_SHIFT)
80 #define MCG_C5_PLLREFSEL0_VAL ((MCG->C5 & MCG_C5_PLLREFSEL0_MASK) >> MCG_C5_PLLREFSEL0_SHIFT)
81 #define MCG_C11_PLLREFSEL1_VAL ((MCG->C11 & MCG_C11_PLLREFSEL1_MASK) >> MCG_C11_PLLREFSEL1_SHIFT)
82 #define MCG_C11_PRDIV1_VAL ((MCG->C11 & MCG_C11_PRDIV1_MASK) >> MCG_C11_PRDIV1_SHIFT)
83 #define MCG_C12_VDIV1_VAL ((MCG->C12 & MCG_C12_VDIV1_MASK) >> MCG_C12_VDIV1_SHIFT)
84 #define MCG_C5_PRDIV0_VAL ((MCG->C5 & MCG_C5_PRDIV0_MASK) >> MCG_C5_PRDIV0_SHIFT)
85 #define MCG_C6_VDIV0_VAL ((MCG->C6 & MCG_C6_VDIV0_MASK) >> MCG_C6_VDIV0_SHIFT)
537 if ((MCG->C2 & MCG_C2_LP_MASK) || (MCG->S & MCG_S_PLLST_MASK)) in CLOCK_GetFllFreq()
558 if (!(MCG->C1 & MCG_C1_IRCLKEN_MASK)) in CLOCK_GetInternalRefClkFreq()
586 if (!(MCG->S & MCG_S_LOCK0_MASK)) in CLOCK_GetPll0Freq()
635 …if ((kMCG_IrcFast == curIrcs) && ((mcgOutClkState == kMCG_ClkOutStatInt) || (MCG->C1 & MCG_C1_IRCL… in CLOCK_SetInternalRefClkConfig()
637 MCG->C2 = ((MCG->C2 & ~MCG_C2_IRCS_MASK) | (MCG_C2_IRCS(kMCG_IrcSlow))); in CLOCK_SetInternalRefClkConfig()
643MCG->SC = (MCG->SC & ~(MCG_SC_FCRDIV_MASK | MCG_SC_ATMF_MASK | MCG_SC_LOCS0_MASK)) | MCG_SC_FCRDIV… in CLOCK_SetInternalRefClkConfig()
647 MCG->C2 = (MCG->C2 & ~MCG_C2_IRCS_MASK) | (MCG_C2_IRCS(ircs)); in CLOCK_SetInternalRefClkConfig()
648 MCG->C1 = (MCG->C1 & ~(MCG_C1_IRCLKEN_MASK | MCG_C1_IREFSTEN_MASK)) | (uint8_t)enableMode; in CLOCK_SetInternalRefClkConfig()
765 MCG->C5 = mcg_c5; /* Disable the PLL first. */ in CLOCK_EnablePll0()
767 MCG->C6 = (MCG->C6 & ~MCG_C6_VDIV0_MASK) | MCG_C6_VDIV0(config->vdiv); in CLOCK_EnablePll0()
770 MCG->C5 |= ((uint32_t)kMCG_PllEnableIndependent | (uint32_t)config->enableMode); in CLOCK_EnablePll0()
773 while (!(MCG->S & MCG_S_LOCK0_MASK)) in CLOCK_EnablePll0()
781 MCG->SC &= ~MCG_SC_ATMF_MASK; in CLOCK_SetOsc0MonitorMode()
785 MCG->C6 &= ~MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
791 MCG->C2 &= ~MCG_C2_LOCRE0_MASK; in CLOCK_SetOsc0MonitorMode()
795 MCG->C2 |= MCG_C2_LOCRE0_MASK; in CLOCK_SetOsc0MonitorMode()
797 MCG->C6 |= MCG_C6_CME0_MASK; in CLOCK_SetOsc0MonitorMode()
806 MCG->S = MCG_S_LOLS0_MASK; in CLOCK_SetPll0MonitorMode()
810 MCG->C6 &= ~MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
814 mcg_c8 = MCG->C8; in CLOCK_SetPll0MonitorMode()
824 MCG->C8 = mcg_c8; in CLOCK_SetPll0MonitorMode()
825 MCG->C6 |= MCG_C6_LOLIE0_MASK; in CLOCK_SetPll0MonitorMode()
832 uint8_t mcg_s = MCG->S; in CLOCK_GetStatusFlags()
834 if (MCG->SC & MCG_SC_LOCS0_MASK) in CLOCK_GetStatusFlags()
857 MCG->SC &= ~MCG_SC_ATMF_MASK; in CLOCK_ClearStatusFlags()
861 MCG->S = MCG_S_LOLS0_MASK; in CLOCK_ClearStatusFlags()
872 MCG->C2 = ((MCG->C2 & ~OSC_MODE_MASK) | MCG_C2_RANGE(range) | (uint8_t)config->workMode); in CLOCK_InitOsc0()
877 while (!(MCG->S & MCG_S_OSCINIT0_MASK)) in CLOCK_InitOsc0()
886 MCG->C2 &= ~OSC_MODE_MASK; in CLOCK_DeinitOsc0()
916 if (MCG_S_IREFST(kMCG_FllSrcInternal) == (MCG->S & MCG_S_IREFST_MASK)) in CLOCK_TrimInternalRefClk()
930 MCG->ATCVL = (uint8_t)actv; in CLOCK_TrimInternalRefClk()
931 MCG->ATCVH = (uint8_t)(actv >> 8U); in CLOCK_TrimInternalRefClk()
933 mcg_sc = MCG->SC; in CLOCK_TrimInternalRefClk()
936 MCG->SC = (mcg_sc | MCG_SC_ATME_MASK); in CLOCK_TrimInternalRefClk()
939 while (MCG->SC & MCG_SC_ATME_MASK) in CLOCK_TrimInternalRefClk()
944 if (MCG->SC & MCG_SC_ATMF_MASK) in CLOCK_TrimInternalRefClk()
947 MCG->SC = mcg_sc; in CLOCK_TrimInternalRefClk()
1077 mcg_c4 = MCG->C4; in CLOCK_SetFeiMode()
1089 MCG->C4 ^= (1U << MCG_C4_DRST_DRS_SHIFT); in CLOCK_SetFeiMode()
1093 MCG->C1 = in CLOCK_SetFeiMode()
1094 …((MCG->C1 & ~(MCG_C1_CLKS_MASK | MCG_C1_IREFS_MASK))) | (MCG_C1_CLKS(kMCG_ClkOutSrcOut) /* … in CLOCK_SetFeiMode()
1105 MCG->C4 = mcg_c4; in CLOCK_SetFeiMode()
1109MCG->C4 = (mcg_c4 & ~(MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) | (MCG_C4_DMX32(dmx32) | MCG_C4_D… in CLOCK_SetFeiMode()
1137 mcg_c4 = MCG->C4; in CLOCK_SetFeeMode()
1149 MCG->C4 ^= (1U << MCG_C4_DRST_DRS_SHIFT); in CLOCK_SetFeeMode()
1153 MCG->C1 = ((MCG->C1 & ~(MCG_C1_CLKS_MASK | MCG_C1_FRDIV_MASK | MCG_C1_IREFS_MASK)) | in CLOCK_SetFeeMode()
1160 if (MCG->C2 & MCG_C2_EREFS_MASK) in CLOCK_SetFeeMode()
1162 while (!(MCG->S & MCG_S_OSCINIT0_MASK)) in CLOCK_SetFeeMode()
1176 MCG->C4 = mcg_c4; in CLOCK_SetFeeMode()
1181 MCG->C4 = mcg_c4; in CLOCK_SetFeeMode()
1184 while (MCG->C4 != mcg_c4) in CLOCK_SetFeeMode()
1218 mcg_c4 = MCG->C4; in CLOCK_SetFbiMode()
1220 MCG->C2 &= ~MCG_C2_LP_MASK; /* Disable lowpower. */ in CLOCK_SetFbiMode()
1232 MCG->C4 ^= (1U << MCG_C4_DRST_DRS_SHIFT); in CLOCK_SetFbiMode()
1236 MCG->C1 = in CLOCK_SetFbiMode()
1237 …((MCG->C1 & ~(MCG_C1_CLKS_MASK | MCG_C1_IREFS_MASK)) | (MCG_C1_CLKS(kMCG_ClkOutSrcInternal) /* … in CLOCK_SetFbiMode()
1248 MCG->C4 = mcg_c4; in CLOCK_SetFbiMode()
1255MCG->C4 = (mcg_c4 & ~(MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) | (MCG_C4_DMX32(dmx32) | MCG_C4_D… in CLOCK_SetFbiMode()
1281 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetFbeMode()
1282 while (MCG->S & MCG_S_PLLST_MASK) in CLOCK_SetFbeMode()
1287 MCG->C2 &= ~MCG_C2_LP_MASK; in CLOCK_SetFbeMode()
1289 mcg_c4 = MCG->C4; in CLOCK_SetFbeMode()
1301 MCG->C4 ^= (1U << MCG_C4_DRST_DRS_SHIFT); in CLOCK_SetFbeMode()
1305 MCG->C1 = ((MCG->C1 & ~(MCG_C1_CLKS_MASK | MCG_C1_FRDIV_MASK | MCG_C1_IREFS_MASK)) | in CLOCK_SetFbeMode()
1312 if (MCG->C2 & MCG_C2_EREFS_MASK) in CLOCK_SetFbeMode()
1314 while (!(MCG->S & MCG_S_OSCINIT0_MASK)) in CLOCK_SetFbeMode()
1328 MCG->C4 = mcg_c4; in CLOCK_SetFbeMode()
1358 MCG->C2 |= MCG_C2_LP_MASK; in CLOCK_SetBlpiMode()
1373 MCG->C2 |= MCG_C2_LP_MASK; in CLOCK_SetBlpeMode()
1386 MCG->C2 &= ~MCG_C2_LP_MASK; /* Disable lowpower. */ in CLOCK_SetPbeMode()
1389MCG->C1 = ((MCG->C1 & ~(MCG_C1_CLKS_MASK | MCG_C1_IREFS_MASK)) | MCG_C1_CLKS(kMCG_ClkOutSrcExterna… in CLOCK_SetPbeMode()
1392 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_SetPbeMode()
1398 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1399 while (MCG->S & MCG_S_PLLST_MASK) in CLOCK_SetPbeMode()
1409 MCG->C6 |= MCG_C6_PLLS_MASK; in CLOCK_SetPbeMode()
1412 while (!(MCG->S & MCG_S_PLLST_MASK)) in CLOCK_SetPbeMode()
1430 MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcOut); in CLOCK_SetPeeMode()
1443 if (MCG->S & MCG_S_IREFST_MASK) in CLOCK_ExternalModeToFbeModeQuick()
1450 MCG->C2 &= ~MCG_C2_LP_MASK; in CLOCK_ExternalModeToFbeModeQuick()
1452 MCG->C1 = ((MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcExternal)); in CLOCK_ExternalModeToFbeModeQuick()
1458 MCG->C6 &= ~MCG_C6_PLLS_MASK; in CLOCK_ExternalModeToFbeModeQuick()
1459 while (MCG->S & MCG_S_PLLST_MASK) in CLOCK_ExternalModeToFbeModeQuick()
1469 if (!(MCG->S & MCG_S_IREFST_MASK)) in CLOCK_InternalModeToFbiModeQuick()
1476 MCG->C2 &= ~MCG_C2_LP_MASK; in CLOCK_InternalModeToFbiModeQuick()
1478 MCG->C1 = ((MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcInternal)); in CLOCK_InternalModeToFbiModeQuick()
1505 MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcInternal); in CLOCK_BootToBlpiMode()
1511 MCG->C2 |= MCG_C2_LP_MASK; in CLOCK_BootToBlpiMode()
1521 MCG->C1 = in CLOCK_BootToBlpeMode()
1522 …((MCG->C1 & ~(MCG_C1_CLKS_MASK | MCG_C1_IREFS_MASK)) | (MCG_C1_CLKS(kMCG_ClkOutSrcExternal) /* … in CLOCK_BootToBlpeMode()
1527 if (MCG->C2 & MCG_C2_EREFS_MASK) in CLOCK_BootToBlpeMode()
1529 while (!(MCG->S & MCG_S_OSCINIT0_MASK)) in CLOCK_BootToBlpeMode()
1536 while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) != in CLOCK_BootToBlpeMode()
1542 MCG->C2 |= MCG_C2_LP_MASK; in CLOCK_BootToBlpeMode()
1556 MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcOut); in CLOCK_BootToPeeMode()
1603 MCG->C2 &= ~MCG_C2_LP_MASK; /* Disable lowpower. */ in CLOCK_SetMcgConfig()
1649 MCG->C1 = ((MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcExternal)); in CLOCK_SetMcgConfig()
1673 MCG->C5 &= ~(uint32_t)kMCG_PllEnableIndependent; in CLOCK_SetMcgConfig()