Lines Matching refs:SCG
794 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
814 SCG->RCCR = *(Config.configInt); in CLOCK_SetRunModeSysClkConfig()
834 SCG->HCCR = *(Config.configInt); in CLOCK_SetHsrunModeSysClkConfig()
854 *(Config.configInt) = SCG->CSR; in CLOCK_GetCurSysClkConfig()
867 SCG->CLKOUTCNFG = SCG_CLKOUTCNFG_CLKOUTSEL(setting); in CLOCK_SetClkOutSel()
916 uint32_t reg = SCG->SOSCDIV; in CLOCK_SetSysOscAsyncClkDiv()
928 SCG->SOSCDIV = reg; in CLOCK_SetSysOscAsyncClkDiv()
953 return (bool)(SCG->SOSCCSR & SCG_SOSCCSR_SOSCERR_MASK); in CLOCK_IsSysOscErr()
961 SCG->SOSCCSR |= SCG_SOSCCSR_SOSCERR_MASK; in CLOCK_ClearSysOscErr()
974 uint32_t reg = SCG->SOSCCSR; in CLOCK_SetSysOscMonitorMode()
980 SCG->SOSCCSR = reg; in CLOCK_SetSysOscMonitorMode()
990 return (bool)(SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK); in CLOCK_IsSysOscValid()
1039 uint32_t reg = SCG->SIRCDIV; in CLOCK_SetSircAsyncClkDiv()
1051 SCG->SIRCDIV = reg; in CLOCK_SetSircAsyncClkDiv()
1076 return (bool)(SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK); in CLOCK_IsSircValid()
1124 uint32_t reg = SCG->FIRCDIV; in CLOCK_SetFircAsyncClkDiv()
1136 SCG->FIRCDIV = reg; in CLOCK_SetFircAsyncClkDiv()
1161 return (bool)(SCG->FIRCCSR & SCG_FIRCCSR_FIRCERR_MASK); in CLOCK_IsFircErr()
1169 SCG->FIRCCSR |= SCG_FIRCCSR_FIRCERR_MASK; in CLOCK_ClearFircErr()
1179 return (bool)(SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK); in CLOCK_IsFircValid()
1265 uint32_t reg = SCG->SPLLDIV; in CLOCK_SetSysPllAsyncClkDiv()
1277 SCG->SPLLDIV = reg; in CLOCK_SetSysPllAsyncClkDiv()
1302 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1310 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
1323 uint32_t reg = SCG->SPLLCSR; in CLOCK_SetSysPllMonitorMode()
1329 SCG->SPLLCSR = reg; in CLOCK_SetSysPllMonitorMode()
1339 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK); in CLOCK_IsSysPllValid()