Lines Matching refs:SCG
788 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
808 SCG->RCCR = *(Config.configInt); in CLOCK_SetRunModeSysClkConfig()
828 SCG->HCCR = *(Config.configInt); in CLOCK_SetHsrunModeSysClkConfig()
848 *(Config.configInt) = SCG->CSR; in CLOCK_GetCurSysClkConfig()
861 SCG->CLKOUTCNFG = SCG_CLKOUTCNFG_CLKOUTSEL(setting); in CLOCK_SetClkOutSel()
910 uint32_t reg = SCG->SOSCDIV; in CLOCK_SetSysOscAsyncClkDiv()
922 SCG->SOSCDIV = reg; in CLOCK_SetSysOscAsyncClkDiv()
947 return (bool)(SCG->SOSCCSR & SCG_SOSCCSR_SOSCERR_MASK); in CLOCK_IsSysOscErr()
955 SCG->SOSCCSR |= SCG_SOSCCSR_SOSCERR_MASK; in CLOCK_ClearSysOscErr()
968 uint32_t reg = SCG->SOSCCSR; in CLOCK_SetSysOscMonitorMode()
974 SCG->SOSCCSR = reg; in CLOCK_SetSysOscMonitorMode()
984 return (bool)(SCG->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK); in CLOCK_IsSysOscValid()
1033 uint32_t reg = SCG->SIRCDIV; in CLOCK_SetSircAsyncClkDiv()
1045 SCG->SIRCDIV = reg; in CLOCK_SetSircAsyncClkDiv()
1070 return (bool)(SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK); in CLOCK_IsSircValid()
1118 uint32_t reg = SCG->FIRCDIV; in CLOCK_SetFircAsyncClkDiv()
1130 SCG->FIRCDIV = reg; in CLOCK_SetFircAsyncClkDiv()
1155 return (bool)(SCG->FIRCCSR & SCG_FIRCCSR_FIRCERR_MASK); in CLOCK_IsFircErr()
1163 SCG->FIRCCSR |= SCG_FIRCCSR_FIRCERR_MASK; in CLOCK_ClearFircErr()
1173 return (bool)(SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK); in CLOCK_IsFircValid()
1259 uint32_t reg = SCG->SPLLDIV; in CLOCK_SetSysPllAsyncClkDiv()
1271 SCG->SPLLDIV = reg; in CLOCK_SetSysPllAsyncClkDiv()
1296 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1304 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
1317 uint32_t reg = SCG->SPLLCSR; in CLOCK_SetSysPllMonitorMode()
1323 SCG->SPLLCSR = reg; in CLOCK_SetSysPllMonitorMode()
1333 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK); in CLOCK_IsSysPllValid()