735 AT_QUICKACCESS_SECTION_CODE(static void POWER_EnableXspiCache(CACHE64_CTRL_Type *cache))  in AT_QUICKACCESS_SECTION_CODE()  argument
738 …cache->CCR |= CACHE64_CTRL_CCR_INVW0_MASK | CACHE64_CTRL_CCR_INVW1_MASK | CACHE64_CTRL_CCR_GO_MASK;  in AT_QUICKACCESS_SECTION_CODE()
739     while ((cache->CCR & CACHE64_CTRL_CCR_GO_MASK) != 0x00U)  in AT_QUICKACCESS_SECTION_CODE()
743     cache->CCR &= ~(CACHE64_CTRL_CCR_INVW0_MASK | CACHE64_CTRL_CCR_INVW1_MASK);  in AT_QUICKACCESS_SECTION_CODE()
745     cache->CCR |= CACHE64_CTRL_CCR_ENCACHE_MASK;  in AT_QUICKACCESS_SECTION_CODE()
748 AT_QUICKACCESS_SECTION_CODE(static void POWER_DisableXspiCache(CACHE64_CTRL_Type *cache))  in AT_QUICKACCESS_SECTION_CODE()  argument
751 …cache->CCR |= CACHE64_CTRL_CCR_PUSHW0_MASK | CACHE64_CTRL_CCR_PUSHW1_MASK | CACHE64_CTRL_CCR_GO_MA…  in AT_QUICKACCESS_SECTION_CODE()
752     while ((cache->CCR & CACHE64_CTRL_CCR_GO_MASK) != 0x00U)  in AT_QUICKACCESS_SECTION_CODE()
756     cache->CCR &= ~(CACHE64_CTRL_CCR_PUSHW0_MASK | CACHE64_CTRL_CCR_PUSHW1_MASK);  in AT_QUICKACCESS_SECTION_CODE()
759     cache->CCR &= ~CACHE64_CTRL_CCR_ENCACHE_MASK;  in AT_QUICKACCESS_SECTION_CODE()
762 AT_QUICKACCESS_SECTION_CODE(static void deinitXSPI(XSPI_Type *base, CACHE64_CTRL_Type *cache))  in AT_QUICKACCESS_SECTION_CODE()  argument
772     if ((cache->CCR & CACHE64_CTRL_CCR_ENCACHE_MASK) != 0x00U)  in AT_QUICKACCESS_SECTION_CODE()
775         POWER_DisableXspiCache(cache);  in AT_QUICKACCESS_SECTION_CODE()
782 AT_QUICKACCESS_SECTION_CODE(static void initXSPI(XSPI_Type *base, CACHE64_CTRL_Type *cache))  in AT_QUICKACCESS_SECTION_CODE()  argument
819         POWER_EnableXspiCache(cache);  in AT_QUICKACCESS_SECTION_CODE()