47 void CLOCK_EnableClock(clock_ip_name_t clk)  in CLOCK_EnableClock()  argument
49     uint32_t index   = CLK_GATE_ABSTRACT_REG_OFFSET(clk);  in CLOCK_EnableClock()
50     uint32_t bitMask = 1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk);  in CLOCK_EnableClock()
196 void CLOCK_DisableClock(clock_ip_name_t clk)  in CLOCK_DisableClock()  argument
198     uint32_t index = CLK_GATE_ABSTRACT_REG_OFFSET(clk);  in CLOCK_DisableClock()
203             CLKCTL0->PSCCTL0_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
206             CLKCTL0->PSCCTL1_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
209             CLKCTL0->PSCCTL2_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
212             CLKCTL0->PSCCTL3_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
215             CLKCTL0->PSCCTL4_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
218             CLKCTL0->PSCCTL5_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
221             CLKCTL3->PSCCTL0_COMP_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
224             CLKCTL4->PSCCTL0_MEDIA_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
227             CLKCTL4->PSCCTL1_MEDIA_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
230             SYSCON0->SEC_CLK_CTRL_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
233             CLKCTL0->ONE_SRC_CLKSLICE_ENABLE &= ~(1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
236             CLKCTL3->ONE_SRC_CLKSLICE_ENABLE_COMP &= ~(1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
239             CLKCTL4->ONE_SRC_CLKSLICE_ENABLE &= ~(1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
243             CLKCTL1->PSCCTL0_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
246             CLKCTL1->PSCCTL1_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
249             CLKCTL3->PSCCTL0_SENS_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
252             CLKCTL4->PSCCTL0_SENS_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
255             CLKCTL4->PSCCTL1_SENS_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
258             CLKCTL3->ONE_SRC_CLKSLICE_ENABLE_SENSE &= ~(1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
261             CLKCTL4->ONE_SRC_CLKSLICE_ENABLE_SENSE &= ~(1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
265             CLKCTL2->PSCCTL0_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()
268             SYSCON3->SEC_CLK_CTRL_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk));  in CLOCK_DisableClock()