Lines Matching refs:clk
885 static inline void CLOCK_EnableClock(clock_ip_name_t clk) in CLOCK_EnableClock() argument
887 uint32_t index = CLK_GATE_ABSTRACT_REG_OFFSET(clk); in CLOCK_EnableClock()
892 CLKCTL0->PSCCTL0_SET = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_EnableClock()
895 CLKCTL0->PSCCTL1_SET = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_EnableClock()
898 CLKCTL0->PSCCTL2_SET = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_EnableClock()
901 CLKCTL1->PSCCTL0_SET = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_EnableClock()
904 CLKCTL1->PSCCTL1_SET = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_EnableClock()
907 CLKCTL1->PSCCTL2_SET = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_EnableClock()
915 static inline void CLOCK_DisableClock(clock_ip_name_t clk) in CLOCK_DisableClock() argument
917 uint32_t index = CLK_GATE_ABSTRACT_REG_OFFSET(clk); in CLOCK_DisableClock()
921 CLKCTL0->PSCCTL0_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_DisableClock()
924 CLKCTL0->PSCCTL1_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_DisableClock()
927 CLKCTL0->PSCCTL2_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_DisableClock()
930 CLKCTL1->PSCCTL0_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_DisableClock()
933 CLKCTL1->PSCCTL1_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_DisableClock()
936 CLKCTL1->PSCCTL2_CLR = (1UL << CLK_GATE_ABSTRACT_BITS_SHIFT(clk)); in CLOCK_DisableClock()