Lines Matching refs:ns
733 uint32_t ns = 0U; in AT_QUICKACCESS_SECTION_CODE() local
737 ns += 200U; /* PMU clock startup */ in AT_QUICKACCESS_SECTION_CODE()
738 ns += 2000U / PMU_MIN_CLOCK_MHZ; /* Wakeup sync */ in AT_QUICKACCESS_SECTION_CODE()
739 ns += 1000U / PMU_MIN_CLOCK_MHZ; /* Senquencer start */ in AT_QUICKACCESS_SECTION_CODE()
742 ns += (flag ? 7000UL : 1000UL) / PMU_MIN_CLOCK_MHZ + (flag ? 9000UL : 0UL); in AT_QUICKACCESS_SECTION_CODE()
748 …ns += (flag ? 47000UL : 1000UL) / PMU_MIN_CLOCK_MHZ + (flag ? 1000UL : 0UL); /* Core Regulator LP … in AT_QUICKACCESS_SECTION_CODE()
750 …ns += (switches * 32000U + 1000U) / PMU_MIN_CLOCK_MHZ + switches * 600U; /* Core Regulator Voltage… in AT_QUICKACCESS_SECTION_CODE()
751 …ns += ((SYSCTL0->PDRUNCFG0 & 0x10U) == 0x10U ? 43000UL : 1000UL) / PMU_MIN_CLOCK_MHZ; /* Core Regu… in AT_QUICKACCESS_SECTION_CODE()
756 ns += 2000U / PMU_MIN_CLOCK_MHZ; in AT_QUICKACCESS_SECTION_CODE()
760 ns += (((SYSCTL0->PDSLEEPCFG0 & 0x200U) == 0x200U) ? 39000U : 1300U) + in AT_QUICKACCESS_SECTION_CODE()
765 ns += 1000U / PMU_MIN_CLOCK_MHZ; /* ISO disable */ in AT_QUICKACCESS_SECTION_CODE()
768 …ns += (flag ? 6000U : (((SYSCTL0->PDSLEEPCFG0 & 0x1000U) == 0U) ? 88000U : 1000U)) / PMU_MIN_CLOCK… in AT_QUICKACCESS_SECTION_CODE()
774 ns += (1000U + 47000U * switches + in AT_QUICKACCESS_SECTION_CODE()
778 ns += 1000U / PMU_MIN_CLOCK_MHZ; /* Monitor change */ in AT_QUICKACCESS_SECTION_CODE()
785 ns += 251000U; in AT_QUICKACCESS_SECTION_CODE()
797 ns += temp / PMU_MIN_CLOCK_MHZ; in AT_QUICKACCESS_SECTION_CODE()
799 ns += 1000U / PMU_MIN_CLOCK_MHZ; /* ISO change */ in AT_QUICKACCESS_SECTION_CODE()
806 ns += 7000U / PMU_MIN_CLOCK_MHZ + 50U; in AT_QUICKACCESS_SECTION_CODE()
810 ns += 1000U / PMU_MIN_CLOCK_MHZ; in AT_QUICKACCESS_SECTION_CODE()
815 return (ns * temp + 999U) / 1000U; in AT_QUICKACCESS_SECTION_CODE()