Lines Matching refs:PMC
138 … if (((PMC->LVDCORECTRL & PMC_LVDCORECTRL_LVDCORELVL_MASK) >> PMC_LVDCORECTRL_LVDCORELVL_SHIFT) > \
141 … PMC->LVDCORECTRL = PMC_LVDCORECTRL_LVDCORELVL(kLvdFallingTripVol_720); \
145 #define PMC_REG(off) (*((volatile uint32_t *)(void *)PMC + (off) / 4U))
177 if (PMC->SLEEPCTRL != PMC_SLEEPCTRL_CORELVL(1)) in AT_QUICKACCESS_SECTION_CODE()
180 PMC->SLEEPCTRL = PMC_SLEEPCTRL_CORELVL(1); in AT_QUICKACCESS_SECTION_CODE()
214 if ((PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK)) != 0U) in POWER_DisableLVD()
216 lvdChangeFlag = PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
217 PMC->CTRL &= ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
223 PMC->CTRL |= lvdChangeFlag & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_RestoreLVD()
258 PMC->CTRL |= PMC_CTRL_OTPSWREN_MASK; /* Enable RBB for OTP switch */ in POWER_EnablePD()
272 PMC->CTRL &= ~PMC_CTRL_OTPSWREN_MASK; /* Disable RBB for OTP switch */ in POWER_DisablePD()
284 …PMC->CTRL &= ~PMC_CTRL_CLKDIVEN_MASK; /* Disable internal clock divider to decrease the PMC regist… in POWER_ApplyPD()
286 while ((PMC->STATUS & PMC_STATUS_ACTIVEFSM_MASK) != 0U) in POWER_ApplyPD()
289 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in POWER_ApplyPD()
291 while ((PMC->STATUS & PMC_STATUS_ACTIVEFSM_MASK) != 0U) in POWER_ApplyPD()
294 PMC->CTRL |= PMC_CTRL_CLKDIVEN_MASK; /* Enable internal clock divider for power saving.*/ in POWER_ApplyPD()
303 PMC->FLAGS = statusMask; in POWER_ClearEventFlags()
312 return PMC->FLAGS; in POWER_GetEventFlags()
321 PMC->CTRL |= interruptMask; in POWER_EnableInterrupts()
330 PMC->CTRL &= ~interruptMask; in POWER_DisableInterrupts()
341 PMC->CTRL |= PMC_CTRL_BUFEN_MASK; in POWER_SetAnalogBuffer()
345 PMC->CTRL &= ~PMC_CTRL_BUFEN_MASK; in POWER_SetAnalogBuffer()
358 PMC->PADVRANGE = (*((const uint32_t *)(const void *)config)) & 0x3FFU; in POWER_SetPadVolRange()
384 PMC->AUTOWKUP = 0x800U; in AT_QUICKACCESS_SECTION_CODE()
386 pmc_ctrl = PMC->CTRL; in AT_QUICKACCESS_SECTION_CODE()
387 …PMC->CTRL = (pmc_ctrl | PMC_CTRL_AUTOWKEN_MASK) & ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL… in AT_QUICKACCESS_SECTION_CODE()
395 PMC->CTRL = pmc_ctrl; in AT_QUICKACCESS_SECTION_CODE()
396 PMC->FLAGS = PMC_FLAGS_AUTOWKF_MASK; in AT_QUICKACCESS_SECTION_CODE()
432 PMC->AUTOWKUP = 0x800; in AT_QUICKACCESS_SECTION_CODE()
434 pmc_ctrl = PMC->CTRL; in AT_QUICKACCESS_SECTION_CODE()
435 …PMC->CTRL = (pmc_ctrl | PMC_CTRL_AUTOWKEN_MASK) & ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL… in AT_QUICKACCESS_SECTION_CODE()
443 PMC->CTRL = pmc_ctrl; in AT_QUICKACCESS_SECTION_CODE()
444 PMC->FLAGS = PMC_FLAGS_AUTOWKF_MASK; in AT_QUICKACCESS_SECTION_CODE()
479 PMC->AUTOWKUP = 0x800; in AT_QUICKACCESS_SECTION_CODE()
481 pmc_ctrl = PMC->CTRL; in AT_QUICKACCESS_SECTION_CODE()
482 …PMC->CTRL = (pmc_ctrl | PMC_CTRL_AUTOWKEN_MASK) & ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL… in AT_QUICKACCESS_SECTION_CODE()
490 PMC->CTRL = pmc_ctrl; in AT_QUICKACCESS_SECTION_CODE()
491 PMC->FLAGS = PMC_FLAGS_AUTOWKF_MASK; in AT_QUICKACCESS_SECTION_CODE()
567 PMC->RUNCTRL = powerLdoVoltLevel[idx]; in POWER_SetVoltageForFreq()
599 PMC->LVDCORECTRL = PMC_LVDCORECTRL_LVDCORELVL((uint32_t)volt); in POWER_SetLvdFallingTripVoltage()
605 …uint32_t ret = ((PMC->LVDCORECTRL & PMC_LVDCORECTRL_LVDCORELVL_MASK) >> PMC_LVDCORECTRL_LVDCORELVL… in POWER_GetLvdFallingTripVoltage()
764 step7Flag = (PMC->RUNCTRL != PMC->SLEEPCTRL) && (pmicVddcoreRecoveryTime == 0U); in AT_QUICKACCESS_SECTION_CODE()
784 … temp = (PMC->RUNCTRL & PMC_RUNCTRL_CORELVL_MASK) - (PMC->SLEEPCTRL & PMC_SLEEPCTRL_CORELVL_MASK); in AT_QUICKACCESS_SECTION_CODE()
917 PMC->PMICCFG = (s_pmicCfg == 0U) ? PMICCFG_DEFAULT_VALUE : s_pmicCfg; in AT_QUICKACCESS_SECTION_CODE()
937 PMC->FLAGS = PMC->FLAGS; in AT_QUICKACCESS_SECTION_CODE()
939 PMC->MEMSEQCTRL = PMC_MEMSEQCTRL_MEMSEQNUM(PMC_MEM_SEQ_NUM); in AT_QUICKACCESS_SECTION_CODE()
942 pmc_ctrl = PMC->CTRL; in AT_QUICKACCESS_SECTION_CODE()
943 PMC->CTRL = pmc_ctrl & ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in AT_QUICKACCESS_SECTION_CODE()
952 PMC->CTRL |= PMC_CTRL_OTPSWREN_MASK; in AT_QUICKACCESS_SECTION_CODE()
956 …PMC->CTRL &= ~PMC_CTRL_CLKDIVEN_MASK; /* Disable internal clock divider to decrease the PMC regist… in AT_QUICKACCESS_SECTION_CODE()
957 …while ((PMC->STATUS & PMC_STATUS_ACTIVEFSM_MASK) != 0U) /* Cannot set APPLYCFG when ACTIVEFSM is 1… in AT_QUICKACCESS_SECTION_CODE()
960 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in AT_QUICKACCESS_SECTION_CODE()
961 …while ((PMC->STATUS & PMC_STATUS_ACTIVEFSM_MASK) != 0U) /* Wait all PMC finite state machines fini… in AT_QUICKACCESS_SECTION_CODE()
964 PMC->CTRL |= PMC_CTRL_CLKDIVEN_MASK; /* Enable internal clock divider for power saving.*/ in AT_QUICKACCESS_SECTION_CODE()
1133 PMC->CTRL = pmc_ctrl; in AT_QUICKACCESS_SECTION_CODE()
1140 PMC->CTRL &= in AT_QUICKACCESS_SECTION_CODE()
1142 …while ((PMC->STATUS & PMC_STATUS_ACTIVEFSM_MASK) != 0U) /* Cannot set APPLYCFG when ACTIVEFSM is 1… in AT_QUICKACCESS_SECTION_CODE()
1145 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in AT_QUICKACCESS_SECTION_CODE()
1146 …while ((PMC->STATUS & PMC_STATUS_ACTIVEFSM_MASK) != 0U) /* Wait all PMC finite state machines fini… in AT_QUICKACCESS_SECTION_CODE()
1149 PMC->CTRL |= PMC_CTRL_CLKDIVEN_MASK; /* Enable internal clock divider for power saving.*/ in AT_QUICKACCESS_SECTION_CODE()
1184 PMC->PMICCFG = (s_pmicCfg == 0U) ? PMICCFG_DEFAULT_VALUE : s_pmicCfg; in POWER_EnterDeepPowerDown()
1198 PMC->FLAGS = PMC->FLAGS; in POWER_EnterDeepPowerDown()
1228 PMC->PMICCFG = (s_pmicCfg == 0U) ? PMICCFG_DEFAULT_VALUE : s_pmicCfg; in POWER_EnterFullDeepPowerDown()
1242 PMC->FLAGS = PMC->FLAGS; in POWER_EnterFullDeepPowerDown()