Lines Matching refs:ss
151 …e, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss);
236 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
238 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
240 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
241 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
253 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
254 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
286 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
289 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
685 …se, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss) in ANATOP_PllConfigure() argument
691 if (ss != NULL) in ANATOP_PllConfigure()
694 …PLL_SPREAD_SPECTRUM_STEP(ss->step) | PLL_SPREAD_SPECTRUM_STOP(ss->stop) | PLL_SPREAD_SPECTRUM_ENAB… in ANATOP_PllConfigure()
743 clock_pll_ss_config_t ss = {0}; in CLOCK_InitAudioPllWithFreq() local
744 CLOCK_CalcPllSpreadSpectrum(config.denominator, ssRange, ssMod, &ss); in CLOCK_InitAudioPllWithFreq()
745 config.ss = &ss; in CLOCK_InitAudioPllWithFreq()
783 (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL); in CLOCK_InitAudioPll()
1020 (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL); in CLOCK_InitSysPll1()