182                                 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss)  in CLOCK_CalcPllSpreadSpectrum()  argument
274     assert(ss != NULL);  in CLOCK_CalcPllSpreadSpectrum()
276     ss->stop = (uint16_t)(factor * range / XTAL_FREQ);  in CLOCK_CalcPllSpreadSpectrum()
277     ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ);  in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) |  in CLOCK_InitSysPll2()
290               ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS))  in CLOCK_InitSysPll2()
322     if ((config != NULL) && (config->ssEnable) && (config->ss != NULL))  in CLOCK_InitSysPll2()
325 …YS_PLL2_SS  = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) |  in CLOCK_InitSysPll2()
326                                    ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step));  in CLOCK_InitSysPll2()
682 …tf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss)  in ANATOP_PllConfigure()  argument
688     if (ss != NULL)  in ANATOP_PllConfigure()
691 …              AUDIO_PLL_SPREAD_SPECTRUM_STEP(ss->step) | AUDIO_PLL_SPREAD_SPECTRUM_STOP(ss->stop) |  in ANATOP_PllConfigure()
739             clock_pll_ss_config_t ss = {0};  in CLOCK_InitAudioPllWithFreq()  local
740             CLOCK_CalcPllSpreadSpectrum(config.denominator, ssRange, ssMod, &ss);  in CLOCK_InitAudioPllWithFreq()
741             config.ss = &ss;  in CLOCK_InitAudioPllWithFreq()
779                         (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL);  in CLOCK_InitAudioPll()
817     if ((config->ss != NULL) && config->ssEnable)  in CLOCK_GPC_SetAudioPllOutputFreq()
819         ANADIG_PLL->PLL_AUDIO_SS = ANADIG_PLL_PLL_AUDIO_SS_STEP(config->ss->step) |  in CLOCK_GPC_SetAudioPllOutputFreq()
820 …              ANADIG_PLL_PLL_AUDIO_SS_STOP(config->ss->stop) | ANADIG_PLL_PLL_AUDIO_SS_ENABLE_MASK;  in CLOCK_GPC_SetAudioPllOutputFreq()
973             clock_pll_ss_config_t ss = {0};  in CLOCK_InitVideoPllWithFreq()  local
974             CLOCK_CalcPllSpreadSpectrum(config.denominator, ssRange, ssMod, &ss);  in CLOCK_InitVideoPllWithFreq()
975             config.ss = &ss;  in CLOCK_InitVideoPllWithFreq()
1013                         (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL);  in CLOCK_InitVideoPll()
1052     if ((config->ss != NULL) && config->ssEnable)  in CLOCK_GPC_SetVideoPllOutputFreq()
1054         ANADIG_PLL->PLL_VIDEO_SS = ANADIG_PLL_PLL_VIDEO_SS_STEP(config->ss->step) |  in CLOCK_GPC_SetVideoPllOutputFreq()
1055 …              ANADIG_PLL_PLL_VIDEO_SS_STOP(config->ss->stop) | ANADIG_PLL_PLL_VIDEO_SS_ENABLE_MASK;  in CLOCK_GPC_SetVideoPllOutputFreq()
1138                         (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL);  in CLOCK_InitSysPll1()
1179     if ((config->ss != NULL) && config->ssEnable)  in CLOCK_GPC_SetSysPll1OutputFreq()
1181         ANADIG_PLL->SYS_PLL1_SS = ANADIG_PLL_SYS_PLL1_SS_STEP(config->ss->step) |  in CLOCK_GPC_SetSysPll1OutputFreq()
1182 …                ANADIG_PLL_SYS_PLL1_SS_STOP(config->ss->stop) | ANADIG_PLL_SYS_PLL1_SS_ENABLE_MASK;  in CLOCK_GPC_SetSysPll1OutputFreq()