Lines Matching refs:reg
18 #define CGC_SOSCDIV_DIV1_VAL(reg) \ argument
19 (((((reg)&CGC_SOSCDIV_DIV1_MASK) >> CGC_SOSCDIV_DIV1_SHIFT) + 1U) * \
20 ((((reg)&CGC_SOSCDIV_DIV1HALT_MASK) >> CGC_SOSCDIV_DIV1HALT_SHIFT) ^ 1U))
21 #define CGC_SOSCDIV_DIV2_VAL(reg) \ argument
22 (((((reg)&CGC_SOSCDIV_DIV2_MASK) >> CGC_SOSCDIV_DIV2_SHIFT) + 1U) * \
23 ((((reg)&CGC_SOSCDIV_DIV2HALT_MASK) >> CGC_SOSCDIV_DIV2HALT_SHIFT) ^ 1U))
24 #define CGC_SOSCDIV_DIV3_VAL(reg) \ argument
25 (((((reg)&CGC_SOSCDIV_DIV3_MASK) >> CGC_SOSCDIV_DIV3_SHIFT) + 1U) * \
26 ((((reg)&CGC_SOSCDIV_DIV3HALT_MASK) >> CGC_SOSCDIV_DIV3HALT_SHIFT) ^ 1U))
27 #define CGC_FRODIV_DIV1_VAL(reg) \ argument
28 (((((reg)&CGC_FRODIV_DIV1_MASK) >> CGC_FRODIV_DIV1_SHIFT) + 1U) * \
29 ((((reg)&CGC_FRODIV_DIV1HALT_MASK) >> CGC_FRODIV_DIV1HALT_SHIFT) ^ 1U))
30 #define CGC_FRODIV_DIV2_VAL(reg) \ argument
31 (((((reg)&CGC_FRODIV_DIV2_MASK) >> CGC_FRODIV_DIV2_SHIFT) + 1U) * \
32 ((((reg)&CGC_FRODIV_DIV2HALT_MASK) >> CGC_FRODIV_DIV2HALT_SHIFT) ^ 1U))
33 #define CGC_FRODIV_DIV3_VAL(reg) \ argument
34 (((((reg)&CGC_FRODIV_DIV3_MASK) >> CGC_FRODIV_DIV3_SHIFT) + 1U) * \
35 ((((reg)&CGC_FRODIV_DIV3HALT_MASK) >> CGC_FRODIV_DIV3HALT_SHIFT) ^ 1U))
293 uint32_t reg; in CLOCK_SetIpSrc() local
298 reg = PCC_REG(name); in CLOCK_SetIpSrc()
300 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrc()
301 …assert(0UL == (reg & PCC_CLKCFG_INUSE_MASK)); /* Should not change if clock has been enabled by ot… in CLOCK_SetIpSrc()
306 reg &= ~PCC_CLKCFG_PCS_MASK; in CLOCK_SetIpSrc()
322 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
338 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
354 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
370 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
386 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
391 reg |= PCC_CLKCFG_PCS(src); in CLOCK_SetIpSrc()
399 PCC_REG(name) = reg & ~PCC_CLKCFG_CGC_MASK; in CLOCK_SetIpSrc()
400 PCC_REG(name) = reg; in CLOCK_SetIpSrc()
506 uint32_t reg = PCC_REG(name); in CLOCK_SetIpSrcDiv() local
509 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_SetIpSrcDiv()
512 …assert(0UL == (reg & PCC_CLKCFG_INUSE_MASK)); /* Should not change if clock has been enabled by ot… in CLOCK_SetIpSrcDiv()
515 …reg = (reg & ~(PCC_CLKCFG_PCS_MASK | PCC_CLKCFG_FRAC_MASK | PCC_CLKCFG_PCD_MASK)) | PCC_CLKCFG_PCS… in CLOCK_SetIpSrcDiv()
522 PCC_REG(name) = reg & ~PCC_CLKCFG_CGC_MASK; in CLOCK_SetIpSrcDiv()
523 PCC_REG(name) = reg; in CLOCK_SetIpSrcDiv()
1356 static uint32_t CLOCK_GetPccFreq(uint32_t pccInst, clock_ip_name_t name, uint32_t reg) in CLOCK_GetPccFreq() argument
1386 freq = (pccInst == 0U) ? CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)) : in CLOCK_GetPccFreq()
1387 CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1394 freq = CLOCK_GetPcc0PlatFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1414 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1437 freq = CLOCK_GetPcc3BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1453 freq = CLOCK_GetPcc4BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1459 freq = CLOCK_GetPcc4PlatFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1471 freq = CLOCK_GetPcc5BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1481 freq = CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)); in CLOCK_GetPccFreq()
1493 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetPccFreq()
1508 uint32_t reg; in CLOCK_GetIpFreq() local
1515 reg = PCC_REG(name); in CLOCK_GetIpFreq()
1517 assert((reg & PCC_CLKCFG_PR_MASK) != 0UL); in CLOCK_GetIpFreq()
1541 freq = CLOCK_GetPccFreq(pccIns, name, reg); in CLOCK_GetIpFreq()
1761 uint32_t reg = CGC_RTD->SOSCCSR; in CLOCK_DeinitSysOsc() local
1765 if ((reg & CGC_SOSCCSR_SOSCSEL_MASK) != 0UL) in CLOCK_DeinitSysOsc()
1770 else if ((reg & CGC_SOSCCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysOsc()
1785 uint32_t reg = *pReg; in CLOCK_SetSysOscAsyncClkDiv() local
1790 reg = (reg & ~(CGC_SOSCDIV_DIV3_MASK | CGC_SOSCDIV_DIV3HALT_MASK)) | in CLOCK_SetSysOscAsyncClkDiv()
1794 reg = (reg & ~(CGC_SOSCDIV_DIV2_MASK | CGC_SOSCDIV_DIV2HALT_MASK)) | in CLOCK_SetSysOscAsyncClkDiv()
1798 reg = (reg & ~(CGC_SOSCDIV_DIV1_MASK | CGC_SOSCDIV_DIV1HALT_MASK)) | in CLOCK_SetSysOscAsyncClkDiv()
1806 *pReg = reg; in CLOCK_SetSysOscAsyncClkDiv()
1874 static uint32_t CLOCK_GetSysOscAsyncFreq(uint32_t reg, cgc_async_clk_t type) in CLOCK_GetSysOscAsyncFreq() argument
1886 divider = CGC_SOSCDIV_DIV3_VAL(reg); in CLOCK_GetSysOscAsyncFreq()
1889 divider = CGC_SOSCDIV_DIV2_VAL(reg); in CLOCK_GetSysOscAsyncFreq()
1892 divider = CGC_SOSCDIV_DIV1_VAL(reg); in CLOCK_GetSysOscAsyncFreq()
1998 uint32_t reg = CGC_RTD->FROCSR; in CLOCK_DeinitFro() local
2002 if ((reg & CGC_FROCSR_FROSEL_MASK) != 0UL) in CLOCK_DeinitFro()
2007 else if ((reg & CGC_FROCSR_LK_MASK) != 0UL) in CLOCK_DeinitFro()
2022 uint32_t reg = *pReg; in CLOCK_SetFroAsyncClkDiv() local
2027 reg = (reg & ~(CGC_FRODIV_DIV3_MASK | CGC_FRODIV_DIV3HALT_MASK)) | in CLOCK_SetFroAsyncClkDiv()
2031 reg = (reg & ~(CGC_FRODIV_DIV2_MASK | CGC_FRODIV_DIV2HALT_MASK)) | in CLOCK_SetFroAsyncClkDiv()
2035 reg = (reg & ~(CGC_FRODIV_DIV1_MASK | CGC_FRODIV_DIV1HALT_MASK)) | in CLOCK_SetFroAsyncClkDiv()
2043 *pReg = reg; in CLOCK_SetFroAsyncClkDiv()
2155 static uint32_t CLOCK_GetFroAsyncFreq(uint32_t reg, cgc_async_clk_t type) in CLOCK_GetFroAsyncFreq() argument
2167 divider = CGC_FRODIV_DIV3_VAL(reg); in CLOCK_GetFroAsyncFreq()
2170 divider = CGC_FRODIV_DIV2_VAL(reg); in CLOCK_GetFroAsyncFreq()
2173 divider = CGC_FRODIV_DIV1_VAL(reg); in CLOCK_GetFroAsyncFreq()
2276 uint32_t reg = CGC_RTD->LPOSCCSR; in CLOCK_DeinitLposc() local
2280 if ((reg & CGC_LPOSCCSR_LK_MASK) != 0UL) in CLOCK_DeinitLposc()
2347 uint32_t reg = CGC_RTD->ROSCCTRL; in CLOCK_SetRtcOscMonitorMode() local
2349 reg &= ~(CGC_ROSCCTRL_ROSCCM_MASK | CGC_ROSCCTRL_ROSCCMRE_MASK); in CLOCK_SetRtcOscMonitorMode()
2351 reg |= (uint32_t)mode; in CLOCK_SetRtcOscMonitorMode()
2353 CGC_RTD->ROSCCTRL = reg; in CLOCK_SetRtcOscMonitorMode()
2433 uint32_t reg = CGC_RTD->PLL0CSR; in CLOCK_DeinitPll0() local
2437 if ((reg & CGC_PLL0CSR_PLLSEL_MASK) != 0UL) in CLOCK_DeinitPll0()
2442 else if ((reg & CGC_PLL0CSR_LK_MASK) != 0UL) in CLOCK_DeinitPll0()
2466 uint32_t reg; in CLOCK_SetPll0AsyncClkDiv() local
2471 reg = CGC_RTD->PLL0DIV_VCO; in CLOCK_SetPll0AsyncClkDiv()
2472 reg = in CLOCK_SetPll0AsyncClkDiv()
2473 (reg & ~(CGC_PLL0DIV_VCO_DIV1_MASK | CGC_PLL0DIV_VCO_DIV1HALT_MASK)) | in CLOCK_SetPll0AsyncClkDiv()
2475 CGC_RTD->PLL0DIV_VCO = reg; in CLOCK_SetPll0AsyncClkDiv()
2478 reg = CGC_RTD->PLL0DIV_PFD_0; in CLOCK_SetPll0AsyncClkDiv()
2479 reg = (reg & ~(CGC_PLL0DIV_PFD_0_DIV1_MASK | CGC_PLL0DIV_PFD_0_DIV1HALT_MASK)) | in CLOCK_SetPll0AsyncClkDiv()
2482 CGC_RTD->PLL0DIV_PFD_0 = reg; in CLOCK_SetPll0AsyncClkDiv()
2485 reg = CGC_RTD->PLL0DIV_PFD_0; in CLOCK_SetPll0AsyncClkDiv()
2486 reg = (reg & ~(CGC_PLL0DIV_PFD_0_DIV2_MASK | CGC_PLL0DIV_PFD_0_DIV2HALT_MASK)) | in CLOCK_SetPll0AsyncClkDiv()
2489 CGC_RTD->PLL0DIV_PFD_0 = reg; in CLOCK_SetPll0AsyncClkDiv()
2749 uint32_t reg = CGC_RTD->PLL1CSR; in CLOCK_DeinitPll1() local
2753 if ((reg & CGC_PLL1CSR_PLLSEL_MASK) != 0UL) in CLOCK_DeinitPll1()
2758 else if ((reg & CGC_PLL1CSR_LK_MASK) != 0UL) in CLOCK_DeinitPll1()
2783 uint32_t reg; in CLOCK_SetPll1AsyncClkDiv() local
2788 reg = CGC_RTD->PLL1DIV_VCO; in CLOCK_SetPll1AsyncClkDiv()
2789 reg = in CLOCK_SetPll1AsyncClkDiv()
2790 (reg & ~(CGC_PLL1DIV_VCO_DIV1_MASK | CGC_PLL1DIV_VCO_DIV1HALT_MASK)) | in CLOCK_SetPll1AsyncClkDiv()
2792 CGC_RTD->PLL1DIV_VCO = reg; in CLOCK_SetPll1AsyncClkDiv()
2795 reg = CGC_RTD->PLL1DIV_PFD_0; in CLOCK_SetPll1AsyncClkDiv()
2796 reg = (reg & ~(CGC_PLL1DIV_PFD_0_DIV1_MASK | CGC_PLL1DIV_PFD_0_DIV1HALT_MASK)) | in CLOCK_SetPll1AsyncClkDiv()
2799 CGC_RTD->PLL1DIV_PFD_0 = reg; in CLOCK_SetPll1AsyncClkDiv()
2802 reg = CGC_RTD->PLL1DIV_PFD_0; in CLOCK_SetPll1AsyncClkDiv()
2803 reg = (reg & ~(CGC_PLL1DIV_PFD_0_DIV2_MASK | CGC_PLL1DIV_PFD_0_DIV2HALT_MASK)) | in CLOCK_SetPll1AsyncClkDiv()
2806 CGC_RTD->PLL1DIV_PFD_0 = reg; in CLOCK_SetPll1AsyncClkDiv()
3242 uint32_t reg = CGC_LPAV->PLL4CSR; in CLOCK_DeinitPll4() local
3246 if ((reg & CGC_LPAV_PLL4CSR_PLLSEL_MASK) != 0UL) in CLOCK_DeinitPll4()
3251 else if ((reg & CGC_LPAV_PLL4CSR_LK_MASK) != 0UL) in CLOCK_DeinitPll4()
3276 uint32_t reg; in CLOCK_SetPll4AsyncClkDiv() local
3281 reg = CGC_LPAV->PLL4DIV_VCO; in CLOCK_SetPll4AsyncClkDiv()
3282 reg = in CLOCK_SetPll4AsyncClkDiv()
3283 (reg & ~(CGC_LPAV_PLL4DIV_VCO_DIV1_MASK | CGC_LPAV_PLL4DIV_VCO_DIV1HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3285 CGC_LPAV->PLL4DIV_VCO = reg; in CLOCK_SetPll4AsyncClkDiv()
3288 reg = CGC_LPAV->PLL4DIV_PFD_0; in CLOCK_SetPll4AsyncClkDiv()
3289 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_0_DIV1_MASK | CGC_LPAV_PLL4DIV_PFD_0_DIV1HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3292 CGC_LPAV->PLL4DIV_PFD_0 = reg; in CLOCK_SetPll4AsyncClkDiv()
3295 reg = CGC_LPAV->PLL4DIV_PFD_0; in CLOCK_SetPll4AsyncClkDiv()
3296 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_0_DIV2_MASK | CGC_LPAV_PLL4DIV_PFD_0_DIV2HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3299 CGC_LPAV->PLL4DIV_PFD_0 = reg; in CLOCK_SetPll4AsyncClkDiv()
3302 reg = CGC_LPAV->PLL4DIV_PFD_0; in CLOCK_SetPll4AsyncClkDiv()
3303 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_0_DIV3_MASK | CGC_LPAV_PLL4DIV_PFD_0_DIV3HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3306 CGC_LPAV->PLL4DIV_PFD_0 = reg; in CLOCK_SetPll4AsyncClkDiv()
3309 reg = CGC_LPAV->PLL4DIV_PFD_0; in CLOCK_SetPll4AsyncClkDiv()
3310 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_0_DIV4_MASK | CGC_LPAV_PLL4DIV_PFD_0_DIV4HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3313 CGC_LPAV->PLL4DIV_PFD_0 = reg; in CLOCK_SetPll4AsyncClkDiv()
3316 reg = CGC_LPAV->PLL4DIV_PFD_1; in CLOCK_SetPll4AsyncClkDiv()
3317 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_1_DIV1_MASK | CGC_LPAV_PLL4DIV_PFD_1_DIV1HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3320 CGC_LPAV->PLL4DIV_PFD_1 = reg; in CLOCK_SetPll4AsyncClkDiv()
3323 reg = CGC_LPAV->PLL4DIV_PFD_1; in CLOCK_SetPll4AsyncClkDiv()
3324 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_1_DIV2_MASK | CGC_LPAV_PLL4DIV_PFD_1_DIV2HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3327 CGC_LPAV->PLL4DIV_PFD_1 = reg; in CLOCK_SetPll4AsyncClkDiv()
3330 reg = CGC_LPAV->PLL4DIV_PFD_1; in CLOCK_SetPll4AsyncClkDiv()
3331 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_1_DIV3_MASK | CGC_LPAV_PLL4DIV_PFD_1_DIV3HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3334 CGC_LPAV->PLL4DIV_PFD_1 = reg; in CLOCK_SetPll4AsyncClkDiv()
3337 reg = CGC_LPAV->PLL4DIV_PFD_1; in CLOCK_SetPll4AsyncClkDiv()
3338 … reg = (reg & ~(CGC_LPAV_PLL4DIV_PFD_1_DIV4_MASK | CGC_LPAV_PLL4DIV_PFD_1_DIV4HALT_MASK)) | in CLOCK_SetPll4AsyncClkDiv()
3341 CGC_LPAV->PLL4DIV_PFD_1 = reg; in CLOCK_SetPll4AsyncClkDiv()
3564 uint32_t reg = 0U; in CLOCK_GetWdogClkFreq() local
3569 reg = PCC_REG(kCLOCK_Wdog0); in CLOCK_GetWdogClkFreq()
3570 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetWdogClkFreq()
3573 reg = PCC_REG(kCLOCK_Wdog1); in CLOCK_GetWdogClkFreq()
3574 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetWdogClkFreq()
3577 reg = PCC_REG(kCLOCK_Wdog2); in CLOCK_GetWdogClkFreq()
3578 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetWdogClkFreq()
3581 reg = PCC_REG(kCLOCK_Wdog5); in CLOCK_GetWdogClkFreq()
3582 freq = CLOCK_GetPcc5BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetWdogClkFreq()
3590 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetWdogClkFreq()
3602 uint32_t reg = 0U; in CLOCK_GetFlexspiClkFreq() local
3607 reg = PCC_REG(kCLOCK_Flexspi0); in CLOCK_GetFlexspiClkFreq()
3608 freq = CLOCK_GetPcc0PlatFreq(PCC_PCS_VAL(reg)); in CLOCK_GetFlexspiClkFreq()
3611 reg = PCC_REG(kCLOCK_Flexspi1); in CLOCK_GetFlexspiClkFreq()
3612 freq = CLOCK_GetPcc0PlatFreq(PCC_PCS_VAL(reg)); in CLOCK_GetFlexspiClkFreq()
3620 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetFlexspiClkFreq()
3631 uint32_t reg; in CLOCK_GetLpitClkFreq() local
3633 reg = PCC_REG(kCLOCK_Lpit0); in CLOCK_GetLpitClkFreq()
3634 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpitClkFreq()
3636 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetLpitClkFreq()
3647 uint32_t reg; in CLOCK_GetFlexioClkFreq() local
3649 reg = PCC_REG(kCLOCK_Flexio0); in CLOCK_GetFlexioClkFreq()
3650 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetFlexioClkFreq()
3652 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetFlexioClkFreq()
3664 uint32_t reg = 0U; in CLOCK_GetI3cClkFreq() local
3669 reg = PCC_REG(kCLOCK_I3c0); in CLOCK_GetI3cClkFreq()
3670 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetI3cClkFreq()
3673 reg = PCC_REG(kCLOCK_I3c1); in CLOCK_GetI3cClkFreq()
3674 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetI3cClkFreq()
3682 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetI3cClkFreq()
3694 uint32_t reg = 0U; in CLOCK_GetLpspiClkFreq() local
3699 reg = PCC_REG(kCLOCK_Lpspi0); in CLOCK_GetLpspiClkFreq()
3700 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpspiClkFreq()
3703 reg = PCC_REG(kCLOCK_Lpspi1); in CLOCK_GetLpspiClkFreq()
3704 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpspiClkFreq()
3707 reg = PCC_REG(kCLOCK_Lpspi2); in CLOCK_GetLpspiClkFreq()
3708 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpspiClkFreq()
3711 reg = PCC_REG(kCLOCK_Lpspi3); in CLOCK_GetLpspiClkFreq()
3712 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpspiClkFreq()
3720 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetLpspiClkFreq()
3732 uint32_t reg = 0U; in CLOCK_GetAdcClkFreq() local
3737 reg = PCC_REG(kCLOCK_Adc0); in CLOCK_GetAdcClkFreq()
3738 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetAdcClkFreq()
3741 reg = PCC_REG(kCLOCK_Adc1); in CLOCK_GetAdcClkFreq()
3742 freq = CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetAdcClkFreq()
3750 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetAdcClkFreq()
3762 uint32_t reg = 0U; in CLOCK_GetDacClkFreq() local
3767 reg = PCC_REG(kCLOCK_Dac0); in CLOCK_GetDacClkFreq()
3768 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetDacClkFreq()
3771 reg = PCC_REG(kCLOCK_Dac1); in CLOCK_GetDacClkFreq()
3772 freq = CLOCK_GetPcc0BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetDacClkFreq()
3780 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetDacClkFreq()
3791 uint32_t reg = PCC_REG(kCLOCK_Tpiu); in CLOCK_GetTpiuClkFreq() local
3793 freq = CLOCK_GetPcc0PlatFreq(PCC_PCS_VAL(reg)); in CLOCK_GetTpiuClkFreq()
3795 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpiuClkFreq()
3806 uint32_t reg = PCC_REG(kCLOCK_Swo); in CLOCK_GetSwoClkFreq() local
3808 freq = CLOCK_GetPcc1PlatFreq(PCC_PCS_VAL(reg)); in CLOCK_GetSwoClkFreq()
3810 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetSwoClkFreq()
3816 uint32_t reg; in CLOCK_GetTpm2ClkFreq() local
3827 reg = PCC_REG(kCLOCK_Tpm2); in CLOCK_GetTpm2ClkFreq()
3829 …freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpm2ClkFreq()
3839 uint32_t reg; in CLOCK_GetTpm3ClkFreq() local
3853 reg = PCC_REG(kCLOCK_Tpm3); in CLOCK_GetTpm3ClkFreq()
3855 …freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpm3ClkFreq()
3865 uint32_t reg; in CLOCK_GetTpm67ClkFreq() local
3879 reg = PCC_REG(name); in CLOCK_GetTpm67ClkFreq()
3881 …freq = CLOCK_GetPcc4BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpm67ClkFreq()
3891 uint32_t reg; in CLOCK_GetTpm8ClkFreq() local
3911 reg = PCC_REG(kCLOCK_Tpm8); in CLOCK_GetTpm8ClkFreq()
3913 …freq = CLOCK_GetPcc5BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpm8ClkFreq()
3930 uint32_t reg; in CLOCK_GetTpmClkFreq() local
3935 reg = PCC_REG(kCLOCK_Tpm0); in CLOCK_GetTpmClkFreq()
3936 …freq = CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpmClkFreq()
3939 reg = PCC_REG(kCLOCK_Tpm1); in CLOCK_GetTpmClkFreq()
3940 …freq = CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpmClkFreq()
3951 reg = PCC_REG(kCLOCK_Tpm4); in CLOCK_GetTpmClkFreq()
3952 …freq = CLOCK_GetPcc3BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpmClkFreq()
3955 reg = PCC_REG(kCLOCK_Tpm5); in CLOCK_GetTpmClkFreq()
3956 …freq = CLOCK_GetPcc3BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetTpmClkFreq()
3988 uint32_t reg = 0U; in CLOCK_GetLpi2cClkFreq() local
3993 reg = PCC_REG(kCLOCK_Lpi2c0); in CLOCK_GetLpi2cClkFreq()
3994 freq = CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpi2cClkFreq()
3997 reg = PCC_REG(kCLOCK_Lpi2c1); in CLOCK_GetLpi2cClkFreq()
3998 freq = CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpi2cClkFreq()
4001 reg = PCC_REG(kCLOCK_Lpi2c2); in CLOCK_GetLpi2cClkFreq()
4002 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpi2cClkFreq()
4005 reg = PCC_REG(kCLOCK_Lpi2c3); in CLOCK_GetLpi2cClkFreq()
4006 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpi2cClkFreq()
4014 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetLpi2cClkFreq()
4026 uint32_t reg = 0U; in CLOCK_GetLpuartClkFreq() local
4031 reg = PCC_REG(kCLOCK_Lpuart0); in CLOCK_GetLpuartClkFreq()
4032 freq = CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpuartClkFreq()
4035 reg = PCC_REG(kCLOCK_Lpuart1); in CLOCK_GetLpuartClkFreq()
4036 freq = CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpuartClkFreq()
4039 reg = PCC_REG(kCLOCK_Lpuart2); in CLOCK_GetLpuartClkFreq()
4040 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpuartClkFreq()
4043 reg = PCC_REG(kCLOCK_Lpuart3); in CLOCK_GetLpuartClkFreq()
4044 freq = CLOCK_GetPcc2BusFreq(PCC_PCS_VAL(reg)); in CLOCK_GetLpuartClkFreq()
4052 return freq * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetLpuartClkFreq()
4062 uint32_t reg = PCC_REG(kCLOCK_Flexcan); in CLOCK_GetFlexcanClkFreq() local
4063 …return CLOCK_GetPcc1BusFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U); in CLOCK_GetFlexcanClkFreq()
4073 uint32_t reg = PCC_REG(kCLOCK_Csi); in CLOCK_GetCsiClkFreq() local
4074 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetCsiClkFreq()
4084 uint32_t reg = PCC_REG(kCLOCK_Dsi); in CLOCK_GetDsiClkFreq() local
4085 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetDsiClkFreq()
4095 uint32_t reg = PCC_REG(kCLOCK_Epdc); in CLOCK_GetEpdcClkFreq() local
4096 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetEpdcClkFreq()
4106 uint32_t reg = PCC_REG(kCLOCK_Gpu2d); in CLOCK_GetGpu2dClkFreq() local
4107 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetGpu2dClkFreq()
4117 uint32_t reg = PCC_REG(kCLOCK_Gpu3d); in CLOCK_GetGpu3dClkFreq() local
4118 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetGpu3dClkFreq()
4128 uint32_t reg = PCC_REG(kCLOCK_Dcnano); in CLOCK_GetDcnanoClkFreq() local
4129 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetDcnanoClkFreq()
4139 uint32_t reg = PCC_REG(kCLOCK_CsiClkUi); in CLOCK_GetCsiUiClkFreq() local
4140 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetCsiUiClkFreq()
4150 uint32_t reg = PCC_REG(kCLOCK_CsiClkEsc); in CLOCK_GetCsiEscClkFreq() local
4151 …return CLOCK_GetPcc5PlatFreq(PCC_PCS_VAL(reg)) * (PCC_FRAC_VAL(reg) + 1U) / (PCC_PCD_VAL(reg) + 1U… in CLOCK_GetCsiEscClkFreq()