Lines Matching refs:FIRCCSR
236 SCG0->FIRCCSR &= ~SCG_FIRCCSR_LK_MASK; in CLOCK_SetupFROHFClocking()
239 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
243 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRCEN_MASK; in CLOCK_SetupFROHFClocking()
246 SCG0->FIRCCSR |= SCG_FIRCCSR_LK_MASK; in CLOCK_SetupFROHFClocking()
249 while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U) in CLOCK_SetupFROHFClocking()
476 if (((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCEN_MASK) == 0U) || in CLOCK_GetFroHfFreq()
477 ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT) == 0U)) in CLOCK_GetFroHfFreq()
522 return (((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_MASK) != 0U) || in CLOCK_GetClk48MFreq()
523 ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_SHIFT) == 0U)) ? in CLOCK_GetClk48MFreq()
1274 SCG0->FIRCCSR = (uint32_t)config.trimMode; in CLOCK_FROHFTrimConfig()
1276 if ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCERR_MASK) == SCG_FIRCCSR_FIRCERR_MASK) in CLOCK_FROHFTrimConfig()
1338 if (0U == (SCG0->FIRCCSR & SCG_FIRCCSR_FIRCEN_MASK)) in CLOCK_EnableUsbfsClock()
1347 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_MASK; in CLOCK_EnableUsbfsClock()