112         SCG0->RCCR = (SCG0->RCCR & ~(SCG_RCCR_SCS_MASK)) | SCG_RCCR_SCS(value);  in CLOCK_SetClockSelect()
113         while ((SCG0->CSR & SCG_CSR_SCS_MASK) != SCG_CSR_SCS(value))  in CLOCK_SetClockSelect()
138         actual_sel = (uint32_t)((SCG0->RCCR & SCG_RCCR_SCS_MASK) >> SCG_RCCR_SCS_SHIFT);  in CLOCK_GetClockSelect()
233     SCG0->FIRCCFG = SCG_FIRCCFG_FREQ_SEL(freq_select);  in CLOCK_SetupFROHFClocking()
236     SCG0->FIRCCSR &= ~SCG_FIRCCSR_LK_MASK;  in CLOCK_SetupFROHFClocking()
239     SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_MASK;  in CLOCK_SetupFROHFClocking()
241     SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK;  in CLOCK_SetupFROHFClocking()
243     SCG0->FIRCCSR |= SCG_FIRCCSR_FIRCEN_MASK;  in CLOCK_SetupFROHFClocking()
246     SCG0->FIRCCSR |= SCG_FIRCCSR_LK_MASK;  in CLOCK_SetupFROHFClocking()
249     while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U)  in CLOCK_SetupFROHFClocking()
260     SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK;  in CLOCK_SetupFRO12MClocking()
263     SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK;  in CLOCK_SetupFRO12MClocking()
266     SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK;  in CLOCK_SetupFRO12MClocking()
269     while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U)  in CLOCK_SetupFRO12MClocking()
323     if ((SCG0->SOSCCSR & SCG_SOSCCSR_LK_MASK) != 0U)  in CLOCK_SetupExtClocking()
329     SCG0->SOSCCSR = SCG_SOSCCSR_SOSCERR_MASK;  in CLOCK_SetupExtClocking()
332     SCG0->SOSCCFG = SCG_SOSCCFG_EREFS_MASK | SCG_SOSCCFG_RANGE(range);  in CLOCK_SetupExtClocking()
335     SCG0->SOSCCSR &= ~SCG_SOSCCSR_LK_MASK;  in CLOCK_SetupExtClocking()
338     SCG0->SOSCCSR |= (SCG_SOSCCSR_SOSCCM_MASK | SCG_SOSCCSR_SOSCEN_MASK);  in CLOCK_SetupExtClocking()
341     while ((SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) == 0U)  in CLOCK_SetupExtClocking()
364     if ((SCG0->SOSCCSR & SCG_SOSCCSR_LK_MASK) != 0U)  in CLOCK_SetupExtRefClocking()
370     SCG0->SOSCCSR = SCG_SOSCCSR_SOSCERR_MASK;  in CLOCK_SetupExtRefClocking()
373     SCG0->SOSCCFG &= ~SCG_SOSCCFG_EREFS_MASK;  in CLOCK_SetupExtRefClocking()
376     SCG0->SOSCCSR &= ~SCG_SOSCCSR_LK_MASK;  in CLOCK_SetupExtRefClocking()
379     SCG0->SOSCCSR |= (SCG_SOSCCSR_SOSCCM_MASK | SCG_SOSCCSR_SOSCEN_MASK);  in CLOCK_SetupExtRefClocking()
382     while ((SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) == 0U)  in CLOCK_SetupExtRefClocking()
456     return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U;  in CLOCK_GetFro12MFreq()
476     if (((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCEN_MASK) == 0U) ||  in CLOCK_GetFroHfFreq()
477         ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT) == 0U))  in CLOCK_GetFroHfFreq()
482     switch ((SCG0->FIRCCFG & SCG_FIRCCFG_FREQ_SEL_MASK) >> SCG_FIRCCFG_FREQ_SEL_SHIFT)  in CLOCK_GetFroHfFreq()
522     return (((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_MASK) != 0U) ||  in CLOCK_GetClk48MFreq()
523             ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_SHIFT) == 0U)) ?  in CLOCK_GetClk48MFreq()
553     return ((SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) != 0U) ? s_Ext_Clk_Freq : 0U;  in CLOCK_GetExtClkFreq()
564     switch ((SCG0->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT)  in CLOCK_GetMainClk()
1085     SCG0->FIRCTCFG = SCG_FIRCTCFG_TRIMDIV(config.trimDiv) | SCG_FIRCTCFG_TRIMSRC(config.trimSrc);  in CLOCK_FROHFTrimConfig()
1089         SCG0->FIRCSTAT = SCG_FIRCSTAT_TRIMFINE(config.trimFine);  in CLOCK_FROHFTrimConfig()
1093     SCG0->FIRCCSR = (uint32_t)config.trimMode;  in CLOCK_FROHFTrimConfig()
1095     if ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCERR_MASK) == SCG_FIRCCSR_FIRCERR_MASK)  in CLOCK_FROHFTrimConfig()
1110     SCG0->SIRCTCFG = SCG_SIRCTCFG_TRIMDIV(config.trimDiv) | SCG_SIRCTCFG_TRIMSRC(config.trimSrc);  in CLOCK_FRO12MTrimConfig()
1114         SCG0->SIRCSTAT = SCG_SIRCSTAT_CCOTRIM(config.cltrim);  in CLOCK_FRO12MTrimConfig()
1115         SCG0->SIRCSTAT = SCG_SIRCSTAT_CCOTRIM(config.ccotrim);  in CLOCK_FRO12MTrimConfig()
1119     SCG0->SIRCCSR = (uint32_t)config.trimMode;  in CLOCK_FRO12MTrimConfig()
1121     if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK)  in CLOCK_FRO12MTrimConfig()
1139     uint32_t reg = SCG0->SOSCCSR;  in CLOCK_SetSysOscMonitorMode()
1145     SCG0->SOSCCSR = reg;  in CLOCK_SetSysOscMonitorMode()
1157     if (0U == (SCG0->FIRCCSR & SCG_FIRCCSR_FIRCEN_MASK))  in CLOCK_EnableUsbfsClock()
1166     SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_SCLK_PERIPH_EN_MASK;  in CLOCK_EnableUsbfsClock()