Lines Matching refs:PLL0SSCG1

1060     if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL) /* normal mode */  in pllFindSel()
1163     if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL)  in findPll0MMult()
1166 …(float)(uint32_t)((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_MDIV_EXT_MASK) >> SYSCON_PLL0SSCG1_MDIV_EX…  in findPll0MMult()
1170         mMult_int   = ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_MD_MBS_MASK) << 7U);  in findPll0MMult()
1552         Setup.pllsscg[1] = SYSCON->PLL0SSCG1;  in CLOCK_GetPLL0OutClockRate()
1631     SYSCON->PLL0SSCG1 = pSetup->pllsscg[1];  in CLOCK_SetupPLL0Prec()
1632     SYSCON->PLL0SSCG1 =  in CLOCK_SetupPLL0Prec()
1640         if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL) /* normal mode */  in CLOCK_SetupPLL0Prec()
1712     SYSCON->PLL0SSCG1 = pSetup->pllsscg[1];  in CLOCK_SetPLL0Freq()
1713     SYSCON->PLL0SSCG1 =  in CLOCK_SetPLL0Freq()
1721         if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL) /* normal mode */  in CLOCK_SetPLL0Freq()
1888     SYSCON->PLL0SSCG1 =  in CLOCK_SetupPLL0Mult()