Lines Matching refs:u32RegVal
1518 uint32_t u32RegVal; in POWER_Xtal16mhzCapabankTrim() local
1559 u32RegVal = ANACTRL->XO32M_CTRL; in POWER_Xtal16mhzCapabankTrim()
1560 u32RegVal &= ~(ANACTRL_XO32M_CTRL_OSC_CAP_IN_MASK | ANACTRL_XO32M_CTRL_OSC_CAP_OUT_MASK); in POWER_Xtal16mhzCapabankTrim()
1563 u32RegVal &= ~(ANACTRL_XO32M_CTRL_SLAVE_MASK | ANACTRL_XO32M_CTRL_ACBUF_PASS_ENABLE_MASK); in POWER_Xtal16mhzCapabankTrim()
1565 u32RegVal |= ANACTRL_XO32M_CTRL_SLAVE_MASK | ANACTRL_XO32M_CTRL_ACBUF_PASS_ENABLE_MASK; in POWER_Xtal16mhzCapabankTrim()
1568 …u32RegVal |= (uint32_t)CLOCK_u8OscCapConvert(u8XOCapInCtrl, 13) << ANACTRL_XO32M_CTRL_OSC_CAP_IN_S… in POWER_Xtal16mhzCapabankTrim()
1569 …u32RegVal |= (uint32_t)CLOCK_u8OscCapConvert(u8XOCapOutCtrl, 13) << ANACTRL_XO32M_CTRL_OSC_CAP_OUT… in POWER_Xtal16mhzCapabankTrim()
1571 ANACTRL->XO32M_CTRL = u32RegVal; in POWER_Xtal16mhzCapabankTrim()
1583 uint32_t u32RegVal; in POWER_Xtal32khzCapabankTrim() local
1620 u32RegVal = PMC->XTAL32K; in POWER_Xtal32khzCapabankTrim()
1621 u32RegVal &= ~(PMC_XTAL32K_CAPBANKIN_MASK | PMC_XTAL32K_CAPBANKOUT_MASK); in POWER_Xtal32khzCapabankTrim()
1624 u32RegVal |= (uint32_t)CLOCK_u8OscCapConvert(u8XOCapInCtrl, 23) << PMC_XTAL32K_CAPBANKIN_SHIFT; in POWER_Xtal32khzCapabankTrim()
1625 … u32RegVal |= (uint32_t)CLOCK_u8OscCapConvert(u8XOCapOutCtrl, 23) << PMC_XTAL32K_CAPBANKOUT_SHIFT; in POWER_Xtal32khzCapabankTrim()
1628 PMC->XTAL32K = u32RegVal; in POWER_Xtal32khzCapabankTrim()