Lines Matching refs:clkRate
284 uint32_t clkRate = 0; in SystemCoreClockUpdate() local
294 clkRate = CLK_FRO_12MHZ; in SystemCoreClockUpdate()
297 clkRate = CLK_CLK_IN; in SystemCoreClockUpdate()
300 clkRate = getWdtOscFreq(); in SystemCoreClockUpdate()
305 clkRate = CLK_FRO_96MHZ; in SystemCoreClockUpdate()
309 clkRate = CLK_FRO_48MHZ; in SystemCoreClockUpdate()
318 clkRate = CLK_FRO_12MHZ; in SystemCoreClockUpdate()
321 clkRate = CLK_CLK_IN; in SystemCoreClockUpdate()
324 clkRate = getWdtOscFreq(); in SystemCoreClockUpdate()
327 clkRate = CLK_RTC_32K_CLK; in SystemCoreClockUpdate()
330 clkRate = 0UL; in SystemCoreClockUpdate()
339 clkRate = clkRate / prediv; in SystemCoreClockUpdate()
342 … workRate = (uint64_t)(clkRate) * (uint64_t)findPllMMult(SYSCON->SYSPLLCTRL, SYSCON->SYSPLLMDEC); in SystemCoreClockUpdate()
343 clkRate = (uint32_t)(workRate / ((uint64_t)postdiv)); in SystemCoreClockUpdate()
344 clkRate = clkRate * 2UL; /* PLL CCO output is divided by 2 before to M-Divider */ in SystemCoreClockUpdate()
348 clkRate = CLK_RTC_32K_CLK; in SystemCoreClockUpdate()
351 clkRate = 0UL; in SystemCoreClockUpdate()
354 SystemCoreClock = clkRate / ((SYSCON->AHBCLKDIV & 0xFFUL) + 1UL); in SystemCoreClockUpdate()