68 AT_QUICKACCESS_SECTION_CODE(void BOARD_EnableXspiCache(CACHE64_CTRL_Type *cache))  in AT_QUICKACCESS_SECTION_CODE()  argument
71 …cache->CCR |= CACHE64_CTRL_CCR_INVW0_MASK | CACHE64_CTRL_CCR_INVW1_MASK | CACHE64_CTRL_CCR_GO_MASK;  in AT_QUICKACCESS_SECTION_CODE()
72     while ((cache->CCR & CACHE64_CTRL_CCR_GO_MASK) != 0x00U)  in AT_QUICKACCESS_SECTION_CODE()
76     cache->CCR &= ~(CACHE64_CTRL_CCR_INVW0_MASK | CACHE64_CTRL_CCR_INVW1_MASK);  in AT_QUICKACCESS_SECTION_CODE()
78     cache->CCR |= CACHE64_CTRL_CCR_ENCACHE_MASK;  in AT_QUICKACCESS_SECTION_CODE()
81 AT_QUICKACCESS_SECTION_CODE(void BOARD_DisableXspiCache(CACHE64_CTRL_Type *cache))  in AT_QUICKACCESS_SECTION_CODE()  argument
84 …cache->CCR |= CACHE64_CTRL_CCR_PUSHW0_MASK | CACHE64_CTRL_CCR_PUSHW1_MASK | CACHE64_CTRL_CCR_GO_MA…  in AT_QUICKACCESS_SECTION_CODE()
85     while ((cache->CCR & CACHE64_CTRL_CCR_GO_MASK) != 0x00U)  in AT_QUICKACCESS_SECTION_CODE()
89     cache->CCR &= ~(CACHE64_CTRL_CCR_PUSHW0_MASK | CACHE64_CTRL_CCR_PUSHW1_MASK);  in AT_QUICKACCESS_SECTION_CODE()
92     cache->CCR &= ~CACHE64_CTRL_CCR_ENCACHE_MASK;  in AT_QUICKACCESS_SECTION_CODE()
170 void BOARD_DeinitXspi(XSPI_Type *base, CACHE64_CTRL_Type *cache)  in BOARD_DeinitXspi()  argument
187     if ((cache->CCR & CACHE64_CTRL_CCR_ENCACHE_MASK) != 0x00U)  in BOARD_DeinitXspi()
189         BOARD_DisableXspiCache(cache);  in BOARD_DeinitXspi()
199 void BOARD_InitXspi(XSPI_Type *base, CACHE64_CTRL_Type *cache)  in BOARD_InitXspi()  argument
241     if ((cache->CCR & CACHE64_CTRL_CCR_ENCACHE_MASK) == 0x00U)  in BOARD_InitXspi()
243         BOARD_EnableXspiCache(cache);  in BOARD_InitXspi()