Lines Matching refs:LUT
134 //FLEXSPI1->LUT[0] = 0x0A1804EB; // AHB Quad Read Change to use Fast Read Quad
136 //FLEXSPI1->LUT[1] = 0x26043206;
138 //FLEXSPI1->LUT[2] = 0x00000000;
140 //FLEXSPI1->LUT[3] = 0x00000000;
143 //FLEXSPI1->LUT[4] = 0x00000406; // Write Enable
145 //FLEXSPI1->LUT[5] = 0x00000000;
147 //FLEXSPI1->LUT[6] = 0x00000000;
149 //FLEXSPI1->LUT[7] = 0x00000000;
152 //FLEXSPI1->LUT[8] = 0x20040401; // Wirte s1
154 //FLEXSPI1->LUT[9] = 0x00000000;
156 //FLEXSPI1->LUT[10] = 0x00000000;
158 //FLEXSPI1->LUT[11] = 0x00000000;
161 //FLEXSPI1->LUT[12] = 0x24040405; // Read s1
163 //FLEXSPI1->LUT[13] = 0x00000000;
165 //FLEXSPI1->LUT[14] = 0x00000000;
167 //FLEXSPI1->LUT[15] = 0x00000000;
170 //FLEXSPI1->LUT[16] = 0x00000404; // Write Disable
172 //FLEXSPI1->LUT[17] = 0x00000000;
174 //FLEXSPI1->LUT[18] = 0x00000000;
176 //FLEXSPI1->LUT[19] = 0x00000000;
179 //FLEXSPI1->LUT[20] = 0x20040431; // Wirte s2
181 //FLEXSPI1->LUT[21] = 0x00000000;
183 //FLEXSPI1->LUT[22] = 0x00000000;
185 //FLEXSPI1->LUT[23] = 0x00000000;
188 //FLEXSPI1->LUT[24] = 0x24040435; // Read s2
190 //FLEXSPI1->LUT[25] = 0x00000000;
192 //FLEXSPI1->LUT[26] = 0x00000000;
194 //FLEXSPI1->LUT[27] = 0x00000000;
197 //FLEXSPI1->LUT[28] = 0x00000450; // Write Enable Volatile
199 //FLEXSPI1->LUT[29] = 0x00000000;
201 //FLEXSPI1->LUT[30] = 0x00000000;
203 //FLEXSPI1->LUT[31] = 0x00000000;
348 MEM_WriteU32(0x445E0200, 0x8B1887A0); // LUT[0]
349 MEM_WriteU32(0x445E0204, 0xB7078F10); // LUT[1]
350 MEM_WriteU32(0x445E0208, 0x0000A704); // LUT[2]
351 MEM_WriteU32(0x445E020C, 0x00000000); // LUT[3]
352 MEM_WriteU32(0x445E0210, 0x8B188720); // LUT[4]
353 MEM_WriteU32(0x445E0214, 0xB7078F10); // LUT[5]
354 MEM_WriteU32(0x445E0218, 0x0000A304); // LUT[6]
355 MEM_WriteU32(0x445E021C, 0x00000000); // LUT[7]
356 MEM_WriteU32(0x445E0220, 0x8B1887E0); // LUT[8]
357 MEM_WriteU32(0x445E0224, 0xB7078F10); // LUT[9]
358 MEM_WriteU32(0x445E0228, 0x0000A704); // LUT[10]
359 MEM_WriteU32(0x445E022C, 0x00000000); // LUT[11]
360 MEM_WriteU32(0x445E0230, 0x8B188760); // LUT[12]
361 MEM_WriteU32(0x445E0234, 0xA3048F10); // LUT[13]
362 MEM_WriteU32(0x445E0238, 0x00000000); // LUT[14]
363 MEM_WriteU32(0x445E023C, 0x00000000); // LUT[15]
364 MEM_WriteU32(0x445E0240, 0x00000000); // LUT[16]
365 MEM_WriteU32(0x445E0244, 0x00000000); // LUT[17]
366 MEM_WriteU32(0x445E0248, 0x00000000); // LUT[18]
367 MEM_WriteU32(0x445E024C, 0x00000000); // LUT[19]