Lines Matching refs:base
44 void ADC_Init(ADC_Type* base, const adc_init_config_t* initConfig) in ADC_Init() argument
49 ADC_Deinit(base); in ADC_Init()
54 ADC_GC_REG(base) |= ADC_GC_AVGE_MASK; in ADC_Init()
55 ADC_CFG_REG(base) |= ADC_CFG_AVGS(initConfig->averageNumber); in ADC_Init()
59 ADC_CFG_REG(base) |= ADC_CFG_MODE(initConfig->resolutionMode); in ADC_Init()
62 ADC_SetClockSource(base, initConfig->clockSource, initConfig->divideRatio); in ADC_Init()
72 void ADC_Deinit(ADC_Type* base) in ADC_Deinit() argument
75 ADC_HC0_REG(base) = ADC_HC0_ADCH_MASK; in ADC_Deinit()
76 ADC_HC1_REG(base) = ADC_HC1_ADCH_MASK; in ADC_Deinit()
77 ADC_R0_REG(base) = 0x0; in ADC_Deinit()
78 ADC_R1_REG(base) = 0x0; in ADC_Deinit()
79 ADC_CFG_REG(base) = ADC_CFG_ADSTS(2); in ADC_Deinit()
80 ADC_GC_REG(base) = 0x0; in ADC_Deinit()
81 ADC_GS_REG(base) = ADC_GS_CALF_MASK | ADC_GS_AWKST_MASK; in ADC_Deinit()
82 ADC_CV_REG(base) = 0x0; in ADC_Deinit()
83 ADC_OFS_REG(base) = 0x0; in ADC_Deinit()
84 ADC_CAL_REG(base) = 0x0; in ADC_Deinit()
93 void ADC_SetConvertResultOverwrite(ADC_Type* base, bool enable) in ADC_SetConvertResultOverwrite() argument
96 ADC_CFG_REG(base) |= ADC_CFG_OVWREN_MASK; in ADC_SetConvertResultOverwrite()
98 ADC_CFG_REG(base) &= ~ADC_CFG_OVWREN_MASK; in ADC_SetConvertResultOverwrite()
107 void ADC_SetConvertTrigMode(ADC_Type* base, uint8_t mode) in ADC_SetConvertTrigMode() argument
112 ADC_CFG_REG(base) |= ADC_CFG_ADTRG_MASK; in ADC_SetConvertTrigMode()
114 ADC_CFG_REG(base) &= ~ADC_CFG_ADTRG_MASK; in ADC_SetConvertTrigMode()
123 void ADC_SetConvertSpeed(ADC_Type* base, uint8_t mode) in ADC_SetConvertSpeed() argument
128 ADC_CFG_REG(base) |= ADC_CFG_ADHSC_MASK; in ADC_SetConvertSpeed()
130 ADC_CFG_REG(base) &= ~ADC_CFG_ADHSC_MASK; in ADC_SetConvertSpeed()
139 void ADC_SetSampleTimeDuration(ADC_Type* base, uint8_t duration) in ADC_SetSampleTimeDuration() argument
146 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
147 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
152 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
153 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
158 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
159 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
164 ADC_CFG_REG(base) &= ~ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
165 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
170 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
171 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
176 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
177 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
182 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
183 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
188 ADC_CFG_REG(base) |= ADC_CFG_ADLSMP_MASK; in ADC_SetSampleTimeDuration()
189 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADSTS_MASK)) | in ADC_SetSampleTimeDuration()
201 void ADC_SetPowerMode(ADC_Type* base, uint8_t powerMode) in ADC_SetPowerMode() argument
206 ADC_CFG_REG(base) |= ADC_CFG_ADLPC_MASK; in ADC_SetPowerMode()
208 ADC_CFG_REG(base) &= ~ADC_CFG_ADLPC_MASK; in ADC_SetPowerMode()
217 void ADC_SetClockSource(ADC_Type* base, uint8_t source, uint8_t div) in ADC_SetClockSource() argument
222 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADIV_MASK)) | in ADC_SetClockSource()
224 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_ADICLK_MASK)) | in ADC_SetClockSource()
235 void ADC_SetAsynClockOutput(ADC_Type* base, bool enable) in ADC_SetAsynClockOutput() argument
238 ADC_GC_REG(base) |= ADC_GC_ADACKEN_MASK; in ADC_SetAsynClockOutput()
240 ADC_GC_REG(base) &= ~ADC_GC_ADACKEN_MASK; in ADC_SetAsynClockOutput()
249 void ADC_SetCalibration(ADC_Type* base, bool enable) in ADC_SetCalibration() argument
252 ADC_GC_REG(base) |= ADC_GC_CAL_MASK; in ADC_SetCalibration()
254 ADC_GC_REG(base) &= ~ADC_GC_CAL_MASK; in ADC_SetCalibration()
266 void ADC_SetConvertCmd(ADC_Type* base, uint8_t channel, bool enable) in ADC_SetConvertCmd() argument
273 ADC_GC_REG(base) |= ADC_GC_ADCO_MASK; in ADC_SetConvertCmd()
275 triggerMode = ADC_GetConvertTrigMode(base); in ADC_SetConvertCmd()
277 ADC_HC0_REG(base) = (ADC_HC0_REG(base) & (~ADC_HC0_ADCH_MASK)) | in ADC_SetConvertCmd()
280 ADC_HC1_REG(base) = (ADC_HC1_REG(base) & (~ADC_HC1_ADCH_MASK)) | in ADC_SetConvertCmd()
284 ADC_GC_REG(base) &= ~ADC_GC_ADCO_MASK; in ADC_SetConvertCmd()
296 void ADC_TriggerSingleConvert(ADC_Type* base, uint8_t channel) in ADC_TriggerSingleConvert() argument
301 ADC_GC_REG(base) &= ~ADC_GC_ADCO_MASK; in ADC_TriggerSingleConvert()
303 triggerMode = ADC_GetConvertTrigMode(base); in ADC_TriggerSingleConvert()
305 ADC_HC0_REG(base) = (ADC_HC0_REG(base) & (~ADC_HC0_ADCH_MASK)) | in ADC_TriggerSingleConvert()
308 ADC_HC1_REG(base) = (ADC_HC1_REG(base) & (~ADC_HC1_ADCH_MASK)) | in ADC_TriggerSingleConvert()
320 void ADC_SetAverageNum(ADC_Type* base, uint8_t avgNum) in ADC_SetAverageNum() argument
327 ADC_GC_REG(base) |= ADC_GC_AVGE_MASK; in ADC_SetAverageNum()
329 ADC_CFG_REG(base) = (ADC_CFG_REG(base) & (~ADC_CFG_AVGS_MASK)) | in ADC_SetAverageNum()
335 ADC_GC_REG(base) &= ~ADC_GC_AVGE_MASK; in ADC_SetAverageNum()
345 void ADC_StopConvert(ADC_Type* base) in ADC_StopConvert() argument
349 triggerMode = ADC_GetConvertTrigMode(base); in ADC_StopConvert()
352 ADC_HC0_REG(base) |= ADC_HC0_ADCH_MASK; in ADC_StopConvert()
354 ADC_HC1_REG(base) |= ADC_HC1_ADCH_MASK; in ADC_StopConvert()
363 uint16_t ADC_GetConvertResult(ADC_Type* base) in ADC_GetConvertResult() argument
367 triggerMode = ADC_GetConvertTrigMode(base); in ADC_GetConvertResult()
369 return (uint16_t)((ADC_R0_REG(base) & ADC_R0_D_MASK) >> ADC_R0_D_SHIFT); in ADC_GetConvertResult()
371 return (uint16_t)((ADC_R1_REG(base) & ADC_R1_D_MASK) >> ADC_R1_D_SHIFT); in ADC_GetConvertResult()
381 void ADC_SetCmpMode(ADC_Type* base, uint8_t cmpMode, uint16_t cmpVal1, uint16_t cmpVal2) in ADC_SetCmpMode() argument
388 ADC_GC_REG(base) |= ADC_GC_ACFE_MASK; in ADC_SetCmpMode()
389 ADC_GC_REG(base) &= ~(ADC_GC_ACFGT_MASK | ADC_GC_ACREN_MASK); in ADC_SetCmpMode()
390 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1); in ADC_SetCmpMode()
394 ADC_GC_REG(base) |= ADC_GC_ACFE_MASK; in ADC_SetCmpMode()
395 ADC_GC_REG(base) = (ADC_GC_REG(base) | ADC_GC_ACFGT_MASK) & (~ADC_GC_ACREN_MASK); in ADC_SetCmpMode()
396 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1); in ADC_SetCmpMode()
400 ADC_GC_REG(base) |= ADC_GC_ACFE_MASK; in ADC_SetCmpMode()
401 ADC_GC_REG(base) = (ADC_GC_REG(base) | ADC_GC_ACREN_MASK) & (~ADC_GC_ACFGT_MASK); in ADC_SetCmpMode()
404 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1); in ADC_SetCmpMode()
405 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2); in ADC_SetCmpMode()
410 ADC_GC_REG(base) |= ADC_GC_ACFE_MASK; in ADC_SetCmpMode()
411 ADC_GC_REG(base) = (ADC_GC_REG(base) | ADC_GC_ACREN_MASK) & (~ADC_GC_ACFGT_MASK); in ADC_SetCmpMode()
414 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1); in ADC_SetCmpMode()
415 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2); in ADC_SetCmpMode()
420 ADC_GC_REG(base) |= ADC_GC_ACFE_MASK; in ADC_SetCmpMode()
421 ADC_GC_REG(base) |= ADC_GC_ACREN_MASK | ADC_GC_ACFGT_MASK; in ADC_SetCmpMode()
424 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1); in ADC_SetCmpMode()
425 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2); in ADC_SetCmpMode()
430 ADC_GC_REG(base) |= ADC_GC_ACFE_MASK; in ADC_SetCmpMode()
431 ADC_GC_REG(base) |= ADC_GC_ACREN_MASK | ADC_GC_ACFGT_MASK; in ADC_SetCmpMode()
434 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV1_MASK)) | ADC_CV_CV1(cmpVal1); in ADC_SetCmpMode()
435 ADC_CV_REG(base) = (ADC_CV_REG(base) & (~ADC_CV_CV2_MASK)) | ADC_CV_CV2(cmpVal2); in ADC_SetCmpMode()
440 ADC_GC_REG(base) &= ~ADC_GC_ACFE_MASK; in ADC_SetCmpMode()
451 void ADC_SetCorrectionMode(ADC_Type* base, bool correctMode) in ADC_SetCorrectionMode() argument
454 ADC_OFS_REG(base) |= ADC_OFS_SIGN_MASK; in ADC_SetCorrectionMode()
456 ADC_OFS_REG(base) &= ~ADC_OFS_SIGN_MASK; in ADC_SetCorrectionMode()
465 void ADC_SetIntCmd(ADC_Type* base, bool enable) in ADC_SetIntCmd() argument
469 triggerMode = ADC_GetConvertTrigMode(base); in ADC_SetIntCmd()
473 ADC_HC0_REG(base) |= ADC_HC0_AIEN_MASK; in ADC_SetIntCmd()
475 ADC_HC0_REG(base) &= ~ADC_HC0_AIEN_MASK; in ADC_SetIntCmd()
480 ADC_HC1_REG(base) |= ADC_HC1_AIEN_MASK; in ADC_SetIntCmd()
482 ADC_HC1_REG(base) &= ~ADC_HC1_AIEN_MASK; in ADC_SetIntCmd()
492 bool ADC_IsConvertComplete(ADC_Type* base) in ADC_IsConvertComplete() argument
496 triggerMode = ADC_GetConvertTrigMode(base); in ADC_IsConvertComplete()
498 return (bool)((ADC_HS_REG(base) & ADC_HS_COCO0_MASK) >> ADC_HS_COCO0_SHIFT); in ADC_IsConvertComplete()
500 return (bool)((ADC_HS_REG(base) & ADC_HS_COCO1_MASK) >> ADC_HS_COCO1_SHIFT); in ADC_IsConvertComplete()
509 void ADC_SetDmaCmd(ADC_Type* base, bool enable) in ADC_SetDmaCmd() argument
512 ADC_GC_REG(base) |= ADC_GC_DMAEN_MASK; in ADC_SetDmaCmd()
514 ADC_GC_REG(base) &= ~ADC_GC_DMAEN_MASK; in ADC_SetDmaCmd()