Lines Matching refs:GPMI_BASE_PTR
14814 #define GPMI_BASE_PTR (GPMI) macro
14833 #define GPMI_CTRL0 GPMI_CTRL0_REG(GPMI_BASE_PTR)
14834 #define GPMI_CTRL0_SET GPMI_CTRL0_SET_REG(GPMI_BASE_PTR)
14835 #define GPMI_CTRL0_CLR GPMI_CTRL0_CLR_REG(GPMI_BASE_PTR)
14836 #define GPMI_CTRL0_TOG GPMI_CTRL0_TOG_REG(GPMI_BASE_PTR)
14837 #define GPMI_COMPARE GPMI_COMPARE_REG(GPMI_BASE_PTR)
14838 #define GPMI_ECCCTRL GPMI_ECCCTRL_REG(GPMI_BASE_PTR)
14839 #define GPMI_ECCCTRL_SET GPMI_ECCCTRL_SET_REG(GPMI_BASE_PTR)
14840 #define GPMI_ECCCTRL_CLR GPMI_ECCCTRL_CLR_REG(GPMI_BASE_PTR)
14841 #define GPMI_ECCCTRL_TOG GPMI_ECCCTRL_TOG_REG(GPMI_BASE_PTR)
14842 #define GPMI_ECCCOUNT GPMI_ECCCOUNT_REG(GPMI_BASE_PTR)
14843 #define GPMI_PAYLOAD GPMI_PAYLOAD_REG(GPMI_BASE_PTR)
14844 #define GPMI_AUXILIARY GPMI_AUXILIARY_REG(GPMI_BASE_PTR)
14845 #define GPMI_CTRL1 GPMI_CTRL1_REG(GPMI_BASE_PTR)
14846 #define GPMI_CTRL1_SET GPMI_CTRL1_SET_REG(GPMI_BASE_PTR)
14847 #define GPMI_CTRL1_CLR GPMI_CTRL1_CLR_REG(GPMI_BASE_PTR)
14848 #define GPMI_CTRL1_TOG GPMI_CTRL1_TOG_REG(GPMI_BASE_PTR)
14849 #define GPMI_TIMING0 GPMI_TIMING0_REG(GPMI_BASE_PTR)
14850 #define GPMI_TIMING1 GPMI_TIMING1_REG(GPMI_BASE_PTR)
14851 #define GPMI_TIMING2 GPMI_TIMING2_REG(GPMI_BASE_PTR)
14852 #define GPMI_DATA GPMI_DATA_REG(GPMI_BASE_PTR)
14853 #define GPMI_STAT GPMI_STAT_REG(GPMI_BASE_PTR)
14854 #define GPMI_DEBUG GPMI_DEBUG_REG(GPMI_BASE_PTR)
14855 #define GPMI_VERSION GPMI_VERSION_REG(GPMI_BASE_PTR)
14856 #define GPMI_DEBUG2 GPMI_DEBUG2_REG(GPMI_BASE_PTR)
14857 #define GPMI_DEBUG3 GPMI_DEBUG3_REG(GPMI_BASE_PTR)
14858 #define GPMI_READ_DDR_DLL_CTRL GPMI_READ_DDR_DLL_CTRL_REG(GPMI_BASE_PTR)
14859 #define GPMI_WRITE_DDR_DLL_CTRL GPMI_WRITE_DDR_DLL_CTRL_REG(GPMI_BASE_PTR)
14860 #define GPMI_READ_DDR_DLL_STS GPMI_READ_DDR_DLL_STS_REG(GPMI_BASE_PTR)
14861 #define GPMI_WRITE_DDR_DLL_STS GPMI_WRITE_DDR_DLL_STS_REG(GPMI_BASE_PTR)