200 void DSPI_MasterInit(SPI_Type *base, const dspi_master_config_t *masterConfig, uint32_t srcClock_Hz)  in DSPI_MasterInit()  argument
202     assert(NULL != masterConfig);  in DSPI_MasterInit()
213     DSPI_SetOnePcsPolarity(base, masterConfig->whichPcs, masterConfig->pcsActiveHighOrLow);  in DSPI_MasterInit()
219     base->MCR = temp | SPI_MCR_CONT_SCKE(masterConfig->enableContinuousSCK) |  in DSPI_MasterInit()
220                 SPI_MCR_MTFE(masterConfig->enableModifiedTimingFormat) |  in DSPI_MasterInit()
221 …   SPI_MCR_ROOE(masterConfig->enableRxFifoOverWrite) | SPI_MCR_SMPL_PT(masterConfig->samplePoint) |  in DSPI_MasterInit()
224 …if (0U == DSPI_MasterSetBaudRate(base, masterConfig->whichCtar, masterConfig->ctarConfig.baudRate,…  in DSPI_MasterInit()
229     temp = base->CTAR[masterConfig->whichCtar] &  in DSPI_MasterInit()
232 …base->CTAR[masterConfig->whichCtar] = temp | SPI_CTAR_FMSZ(masterConfig->ctarConfig.bitsPerFrame -…  in DSPI_MasterInit()
233                                           SPI_CTAR_CPOL(masterConfig->ctarConfig.cpol) |  in DSPI_MasterInit()
234                                           SPI_CTAR_CPHA(masterConfig->ctarConfig.cpha) |  in DSPI_MasterInit()
235                                           SPI_CTAR_LSBFE(masterConfig->ctarConfig.direction);  in DSPI_MasterInit()
237     (void)DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_PcsToSck, srcClock_Hz,  in DSPI_MasterInit()
238                                    masterConfig->ctarConfig.pcsToSckDelayInNanoSec);  in DSPI_MasterInit()
239     (void)DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_LastSckToPcs, srcClock_Hz,  in DSPI_MasterInit()
240                                    masterConfig->ctarConfig.lastSckToPcsDelayInNanoSec);  in DSPI_MasterInit()
241 …  (void)DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_BetweenTransfer, srcClock_Hz,  in DSPI_MasterInit()
242                                    masterConfig->ctarConfig.betweenTransferDelayInNanoSec);  in DSPI_MasterInit()
261 void DSPI_MasterGetDefaultConfig(dspi_master_config_t *masterConfig)  in DSPI_MasterGetDefaultConfig()  argument
263     assert(NULL != masterConfig);  in DSPI_MasterGetDefaultConfig()
266     (void)memset(masterConfig, 0, sizeof(*masterConfig));  in DSPI_MasterGetDefaultConfig()
268     masterConfig->whichCtar               = kDSPI_Ctar0;  in DSPI_MasterGetDefaultConfig()
269     masterConfig->ctarConfig.baudRate     = 500000;  in DSPI_MasterGetDefaultConfig()
270     masterConfig->ctarConfig.bitsPerFrame = 8;  in DSPI_MasterGetDefaultConfig()
271     masterConfig->ctarConfig.cpol         = kDSPI_ClockPolarityActiveHigh;  in DSPI_MasterGetDefaultConfig()
272     masterConfig->ctarConfig.cpha         = kDSPI_ClockPhaseFirstEdge;  in DSPI_MasterGetDefaultConfig()
273     masterConfig->ctarConfig.direction    = kDSPI_MsbFirst;  in DSPI_MasterGetDefaultConfig()
275     masterConfig->ctarConfig.pcsToSckDelayInNanoSec        = 1000;  in DSPI_MasterGetDefaultConfig()
276     masterConfig->ctarConfig.lastSckToPcsDelayInNanoSec    = 1000;  in DSPI_MasterGetDefaultConfig()
277     masterConfig->ctarConfig.betweenTransferDelayInNanoSec = 1000;  in DSPI_MasterGetDefaultConfig()
279     masterConfig->whichPcs           = kDSPI_Pcs0;  in DSPI_MasterGetDefaultConfig()
280     masterConfig->pcsActiveHighOrLow = kDSPI_PcsActiveLow;  in DSPI_MasterGetDefaultConfig()
282     masterConfig->enableContinuousSCK        = false;  in DSPI_MasterGetDefaultConfig()
283     masterConfig->enableRxFifoOverWrite      = false;  in DSPI_MasterGetDefaultConfig()
284     masterConfig->enableModifiedTimingFormat = false;  in DSPI_MasterGetDefaultConfig()
285     masterConfig->samplePoint                = kDSPI_SckToSin0Clock;  in DSPI_MasterGetDefaultConfig()