1322         pSetup->pllsscg[1] =  in CLOCK_GetPll0ConfigInternal()
1341 …pSetup->pllsscg[0] = (uint32_t)(PLL0_SSCG_MD_INT_SET(pllMultiplier) | PLL0_SSCG_MD_FRACT_SET((uint…  in CLOCK_GetPll0ConfigInternal()
1342         pSetup->pllsscg[1] = (uint32_t)(PLL0_SSCG_MD_INT_SET(pllMultiplier) >> 32U);  in CLOCK_GetPll0ConfigInternal()
1388             pSetup->pllsscg[0] = s_PllSetupCacheStruct[i].pllsscg[0];  in CLOCK_GetPll0Config()
1389             pSetup->pllsscg[1] = s_PllSetupCacheStruct[i].pllsscg[1];  in CLOCK_GetPll0Config()
1412     s_PllSetupCacheStruct[s_PllSetupCacheIdx].pllsscg[0] = pSetup->pllsscg[0];  in CLOCK_GetPll0Config()
1413     s_PllSetupCacheStruct[s_PllSetupCacheIdx].pllsscg[1] = pSetup->pllsscg[1];  in CLOCK_GetPll0Config()
1551         Setup.pllsscg[0] = SYSCON->PLL0SSCG0;  in CLOCK_GetPLL0OutClockRate()
1552         Setup.pllsscg[1] = SYSCON->PLL0SSCG1;  in CLOCK_GetPLL0OutClockRate()
1592 …pSetup->pllsscg[1] |= (uint32_t)pControl->ss_mf | (uint32_t)pControl->ss_mr | (uint32_t)pControl->…  in CLOCK_SetupPLL0Data()
1595             pSetup->pllsscg[1] |= (1UL << SYSCON_PLL0SSCG1_DITHER_SHIFT);  in CLOCK_SetupPLL0Data()
1630     SYSCON->PLL0SSCG0 = pSetup->pllsscg[0];  in CLOCK_SetupPLL0Prec()
1631     SYSCON->PLL0SSCG1 = pSetup->pllsscg[1];  in CLOCK_SetupPLL0Prec()
1633 …pSetup->pllsscg[1] | (1UL << SYSCON_PLL0SSCG1_MREQ_SHIFT) | (1UL << SYSCON_PLL0SSCG1_MD_REQ_SHIFT)…  in CLOCK_SetupPLL0Prec()
1711     SYSCON->PLL0SSCG0 = pSetup->pllsscg[0];  in CLOCK_SetPLL0Freq()
1712     SYSCON->PLL0SSCG1 = pSetup->pllsscg[1];  in CLOCK_SetPLL0Freq()
1714 …pSetup->pllsscg[1] | (1UL << SYSCON_PLL0SSCG1_MD_REQ_SHIFT) | (1UL << SYSCON_PLL0SSCG1_MREQ_SHIFT)…  in CLOCK_SetPLL0Freq()