377     DmaTcdList[0u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;  in Spi_Ip_CmdDmaTcdSGInit()
378     DmaTcdList[1u].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;  in Spi_Ip_CmdDmaTcdSGInit()
379     DmaTcdList[2u].Param = DMA_IP_CH_SET_SOURCE_SIGNED_OFFSET;  in Spi_Ip_CmdDmaTcdSGInit()
380     DmaTcdList[3u].Param = DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE;  in Spi_Ip_CmdDmaTcdSGInit()
381     DmaTcdList[4u].Param = DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE;  in Spi_Ip_CmdDmaTcdSGInit()
382     DmaTcdList[5u].Param = DMA_IP_CH_SET_MINORLOOP_SIZE;  in Spi_Ip_CmdDmaTcdSGInit()
383     DmaTcdList[6u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_OFFSET;  in Spi_Ip_CmdDmaTcdSGInit()
384     DmaTcdList[7u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_CmdDmaTcdSGInit()
385     DmaTcdList[8u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_CmdDmaTcdSGInit()
416     DmaTcdList[0u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;   in Spi_Ip_TxDmaTcdSGInit()
417     DmaTcdList[1u].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;  in Spi_Ip_TxDmaTcdSGInit()
418     DmaTcdList[2u].Param = DMA_IP_CH_SET_SOURCE_SIGNED_OFFSET;  in Spi_Ip_TxDmaTcdSGInit()
419     DmaTcdList[3u].Param = DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE;  in Spi_Ip_TxDmaTcdSGInit()
420     DmaTcdList[4u].Param = DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE;  in Spi_Ip_TxDmaTcdSGInit()
421     DmaTcdList[5u].Param = DMA_IP_CH_SET_MINORLOOP_SIZE;  in Spi_Ip_TxDmaTcdSGInit()
422     DmaTcdList[6u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_OFFSET;  in Spi_Ip_TxDmaTcdSGInit()
423     DmaTcdList[7u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_TxDmaTcdSGInit()
424     DmaTcdList[8u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_TxDmaTcdSGInit()
425     DmaTcdList[9u].Param = DMA_IP_CH_SET_SOURCE_MODULO;  in Spi_Ip_TxDmaTcdSGInit()
455     DmaTcdList[0u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;   in Spi_Ip_TxDmaTcdSGConfig()
456     DmaTcdList[1u].Param = DMA_IP_CH_SET_SOURCE_SIGNED_OFFSET;  in Spi_Ip_TxDmaTcdSGConfig()
457     DmaTcdList[2u].Param = DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE;  in Spi_Ip_TxDmaTcdSGConfig()
458     DmaTcdList[3u].Param = DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE;  in Spi_Ip_TxDmaTcdSGConfig()
459     DmaTcdList[4u].Param = DMA_IP_CH_SET_MINORLOOP_SIZE;  in Spi_Ip_TxDmaTcdSGConfig()
460     DmaTcdList[5u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_TxDmaTcdSGConfig()
461     DmaTcdList[6u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_TxDmaTcdSGConfig()
462     DmaTcdList[7u].Param = DMA_IP_CH_SET_SOURCE_MODULO;  in Spi_Ip_TxDmaTcdSGConfig()
510     DmaTcdList[0u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;   in Spi_Ip_RxDmaTcdSGInit()
511     DmaTcdList[1u].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;  in Spi_Ip_RxDmaTcdSGInit()
512     DmaTcdList[2u].Param = DMA_IP_CH_SET_SOURCE_SIGNED_OFFSET;  in Spi_Ip_RxDmaTcdSGInit()
513     DmaTcdList[3u].Param = DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE;  in Spi_Ip_RxDmaTcdSGInit()
514     DmaTcdList[4u].Param = DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE;  in Spi_Ip_RxDmaTcdSGInit()
515     DmaTcdList[5u].Param = DMA_IP_CH_SET_MINORLOOP_SIZE;  in Spi_Ip_RxDmaTcdSGInit()
516     DmaTcdList[6u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_OFFSET;  in Spi_Ip_RxDmaTcdSGInit()
517     DmaTcdList[7u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_RxDmaTcdSGInit()
518     DmaTcdList[8u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_RxDmaTcdSGInit()
547     DmaTcdList[0u].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;  in Spi_Ip_RxDmaTcdSGConfig()
548     DmaTcdList[1u].Param = DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE;  in Spi_Ip_RxDmaTcdSGConfig()
549     DmaTcdList[2u].Param = DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE;  in Spi_Ip_RxDmaTcdSGConfig()
550     DmaTcdList[3u].Param = DMA_IP_CH_SET_MINORLOOP_SIZE;  in Spi_Ip_RxDmaTcdSGConfig()
551     DmaTcdList[4u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_OFFSET;  in Spi_Ip_RxDmaTcdSGConfig()
552     DmaTcdList[5u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_RxDmaTcdSGConfig()
553     DmaTcdList[6u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_RxDmaTcdSGConfig()
554     DmaTcdList[7u].Param = DMA_IP_CH_SET_CONTROL_EN_MAJOR_INTERRUPT;  in Spi_Ip_RxDmaTcdSGConfig()
610     DmaTcdList[0u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;  in Spi_Ip_CmdDmaTcdSGConfig()
611     DmaTcdList[1u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_CmdDmaTcdSGConfig()
612     DmaTcdList[2u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_CmdDmaTcdSGConfig()
682         DmaTcdList[1u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;  in Spi_Ip_DmaConfig()
701         DmaTcdList[0u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_DmaConfig()
724             DmaTcdList[2u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_DmaConfig()
726             DmaTcdList[3u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_LAST_ADDR_ADJ;  in Spi_Ip_DmaConfig()
734     DmaTcdList[0u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;   in Spi_Ip_DmaConfig()
735     DmaTcdList[1u].Param = DMA_IP_CH_SET_DESTINATION_ADDRESS;  in Spi_Ip_DmaConfig()
736     DmaTcdList[2u].Param = DMA_IP_CH_SET_SOURCE_SIGNED_OFFSET;  in Spi_Ip_DmaConfig()
737     DmaTcdList[3u].Param = DMA_IP_CH_SET_SOURCE_TRANSFER_SIZE;  in Spi_Ip_DmaConfig()
738     DmaTcdList[4u].Param = DMA_IP_CH_SET_DESTINATION_TRANSFER_SIZE;  in Spi_Ip_DmaConfig()
739     DmaTcdList[5u].Param = DMA_IP_CH_SET_MINORLOOP_SIZE;  in Spi_Ip_DmaConfig()
740     DmaTcdList[6u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_OFFSET;  in Spi_Ip_DmaConfig()
741     DmaTcdList[7u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_DmaConfig()
742     DmaTcdList[8u].Param = DMA_IP_CH_SET_CONTROL_DIS_AUTO_REQUEST;  in Spi_Ip_DmaConfig()
743     DmaTcdList[9u].Param = DMA_IP_CH_SET_SOURCE_MODULO;  in Spi_Ip_DmaConfig()
782     DmaTcdList[10u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_LAST_ADDR_ADJ;  in Spi_Ip_DmaConfig()
824     DmaTcdList[9u].Param = DMA_IP_CH_SET_DESTINATION_SIGNED_LAST_ADDR_ADJ;  in Spi_Ip_DmaConfig()
897         DmaTcdList[1u].Param = DMA_IP_CH_SET_SOURCE_ADDRESS;  in Spi_Ip_DmaContinueTransfer()
916         DmaTcdList[0u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_DmaContinueTransfer()
945     DmaTcdList[0u].Param = DMA_IP_CH_SET_MAJORLOOP_COUNT;  in Spi_Ip_DmaContinueTransfer()
1771             DmaTcdList[0u].Param = DMA_IP_CH_SET_CONTROL_EN_MAJOR_INTERRUPT;  in Spi_Ip_AsyncTransmit()
1905     DmaTcdList[0u].Param = DMA_IP_CH_SET_CONTROL_EN_MAJOR_INTERRUPT;  in Spi_Ip_DmaFastConfig()