261     uint16 Length
268     uint16 Length
1174 static void Spi_Ip_UpdateTxRxCounter(uint8 Instance, uint16 Length)  in Spi_Ip_UpdateTxRxCounter()  argument
1180         State->ExpectedFifoWrites = Length;  in Spi_Ip_UpdateTxRxCounter()
1184         State->ExpectedFifoWrites = Length/2u;  in Spi_Ip_UpdateTxRxCounter()
1207                                                     uint16 Length  in Spi_Ip_CheckValidParameters()  argument
1213         DevAssert((Length%4) == 0u);  in Spi_Ip_CheckValidParameters()
1217         DevAssert((Length%2) == 0u);  in Spi_Ip_CheckValidParameters()
1423                                       uint16 Length,  in Spi_Ip_SyncTransmit()  argument
1441     DevAssert(0u != Length);  in Spi_Ip_SyncTransmit()
1443     Spi_Ip_CheckValidParameters(ExternalDevice, Length);  in Spi_Ip_SyncTransmit()
1479         Spi_Ip_UpdateTxRxCounter(Instance, Length);  in Spi_Ip_SyncTransmit()
1603                                        uint16 Length,  in Spi_Ip_AsyncTransmit()  argument
1622     DevAssert(0u != Length);  in Spi_Ip_AsyncTransmit()
1623     Spi_Ip_CheckValidParameters(ExternalDevice, Length);  in Spi_Ip_AsyncTransmit()
1655             State->ExpectedFifoWrites = Length;  in Spi_Ip_AsyncTransmit()
1659             State->ExpectedFifoWrites = Length/2u;  in Spi_Ip_AsyncTransmit()
1831         DevAssert(0u != FastTransferCfg[Count].Length);  in Spi_Ip_AsyncTransmitFast()
1834             DevAssert((FastTransferCfg[Count].Length%4) == 0u);  in Spi_Ip_AsyncTransmitFast()
1838             DevAssert((FastTransferCfg[Count].Length%2) == 0u);  in Spi_Ip_AsyncTransmitFast()
1842             DevAssert(SPI_IP_DMA_MAX_ITER_CNT_U16 >= FastTransferCfg[Count].Length);  in Spi_Ip_AsyncTransmitFast()
1917             State->ExpectedFifoWrites = FastTransferCfg[Count].Length;  in Spi_Ip_DmaFastConfig()
1921             State->ExpectedFifoWrites = FastTransferCfg[Count].Length/2u;  in Spi_Ip_DmaFastConfig()