Lines Matching refs:FastTransferCfg

221 static void Spi_Ip_DmaFastConfig(uint8 Instance, const Spi_Ip_FastTransferType *FastTransferCfg, ui…
1802 const Spi_Ip_FastTransferType *FastTransferCfg, in Spi_Ip_AsyncTransmitFast() argument
1817 DevAssert(NULL_PTR != FastTransferCfg); in Spi_Ip_AsyncTransmitFast()
1818 DevAssert(NULL_PTR != FastTransferCfg[0u].ExternalDevice); in Spi_Ip_AsyncTransmitFast()
1820 Instance = FastTransferCfg[0u].ExternalDevice->Instance; in Spi_Ip_AsyncTransmitFast()
1830 DevAssert(NULL_PTR != FastTransferCfg[Count].ExternalDevice); in Spi_Ip_AsyncTransmitFast()
1831 DevAssert(0u != FastTransferCfg[Count].Length); in Spi_Ip_AsyncTransmitFast()
1832 if (FastTransferCfg[0u].ExternalDevice->DeviceParams->FrameSize > 16u) in Spi_Ip_AsyncTransmitFast()
1834 DevAssert((FastTransferCfg[Count].Length%4) == 0u); in Spi_Ip_AsyncTransmitFast()
1836 else if (FastTransferCfg[0u].ExternalDevice->DeviceParams->FrameSize > 8u) in Spi_Ip_AsyncTransmitFast()
1838 DevAssert((FastTransferCfg[Count].Length%2) == 0u); in Spi_Ip_AsyncTransmitFast()
1842 DevAssert(SPI_IP_DMA_MAX_ITER_CNT_U16 >= FastTransferCfg[Count].Length); in Spi_Ip_AsyncTransmitFast()
1868 State->ExternalDevice = FastTransferCfg[0u].ExternalDevice; in Spi_Ip_AsyncTransmitFast()
1877 …Base->MODE.CTAR[0u] = FastTransferCfg[0u].ExternalDevice->Ctar[State->ClockMode] | SPI_CTAR_FMSZ((… in Spi_Ip_AsyncTransmitFast()
1879 …Base->MODE.CTAR[0u] = FastTransferCfg[0u].ExternalDevice->Ctar | SPI_CTAR_FMSZ(((uint32)State->Ext… in Spi_Ip_AsyncTransmitFast()
1881 …Base->CTARE[0u] = FastTransferCfg[0u].ExternalDevice->Ctare | SPI_CTARE_FMSZE((((uint32)State->Ext… in Spi_Ip_AsyncTransmitFast()
1883 Spi_Ip_DmaFastConfig(Instance, FastTransferCfg, NumberOfTransfer); in Spi_Ip_AsyncTransmitFast()
1896 static void Spi_Ip_DmaFastConfig(uint8 Instance, const Spi_Ip_FastTransferType *FastTransferCfg, ui… in Spi_Ip_DmaFastConfig() argument
1913 State->TxBuffer = FastTransferCfg[Count].TxBuffer; in Spi_Ip_DmaFastConfig()
1914 State->RxBuffer = FastTransferCfg[Count].RxBuffer; in Spi_Ip_DmaFastConfig()
1917 State->ExpectedFifoWrites = FastTransferCfg[Count].Length; in Spi_Ip_DmaFastConfig()
1921 State->ExpectedFifoWrites = FastTransferCfg[Count].Length/2u; in Spi_Ip_DmaFastConfig()
1929 State->PhyUnitConfig->CmdDmaFast[Count].DefaultData = FastTransferCfg[Count].DefaultData; in Spi_Ip_DmaFastConfig()
1930 …State->PhyUnitConfig->CmdDmaFast[Count].DmaFastPushrCmd = FastTransferCfg[Count].ExternalDevice->P… in Spi_Ip_DmaFastConfig()
1931 …State->PhyUnitConfig->CmdDmaFast[Count].DmaFastPushrCmdLast = FastTransferCfg[Count].ExternalDevic… in Spi_Ip_DmaFastConfig()
1942 if((boolean)FALSE == FastTransferCfg[Count].KeepCs) in Spi_Ip_DmaFastConfig()