Lines Matching refs:ExpectedCmdFifoWrites

319                 if ((NumberOfWrites != 0u) && (State->ExpectedCmdFifoWrites != 0u))  in Spi_Ip_TransferProcess()
681         State->ExpectedCmdFifoWrites -= NumberCmdDmaIterWrite;  in Spi_Ip_DmaConfig()
896         State->ExpectedCmdFifoWrites -= NumberCmdDmaIterWrite;  in Spi_Ip_DmaContinueTransfer()
1148     if (ActualNumberOfWrites > State->ExpectedCmdFifoWrites)  in Spi_Ip_WriteCmdFifo()
1150         ActualNumberOfWrites = State->ExpectedCmdFifoWrites;  in Spi_Ip_WriteCmdFifo()
1154         if((1u == State->ExpectedCmdFifoWrites) && ((boolean)FALSE == State->KeepCs))  in Spi_Ip_WriteCmdFifo()
1162         State->ExpectedCmdFifoWrites--;  in Spi_Ip_WriteCmdFifo()
1191     State->ExpectedCmdFifoWrites = State->ExpectedFifoReads;  in Spi_Ip_UpdateTxRxCounter()
1483 …if ((State->ExpectedCmdFifoWrites <= SPI_IP_CTARE_DTCP_MAX_U16) && (State->ExpectedCmdFifoWrites >…  in Spi_Ip_SyncTransmit()
1501 …Params->FrameSize - 1u) >> 4u) & 0x1u) | SPI_CTARE_DTCP((uint32)State->ExpectedCmdFifoWrites - 1u);  in Spi_Ip_SyncTransmit()
1532                 if ((NumberOfWrites != 0u) && (State->ExpectedCmdFifoWrites != 0u))  in Spi_Ip_SyncTransmit()
1667         State->ExpectedCmdFifoWrites = State->ExpectedFifoReads;  in Spi_Ip_AsyncTransmit()
1721                         if ((NumberOfCmdWrites != 0u) && (State->ExpectedCmdFifoWrites != 0u))  in Spi_Ip_AsyncTransmit()
1928         State->ExpectedCmdFifoWrites = State->ExpectedFifoReads;  in Spi_Ip_DmaFastConfig()
1956             if(State->ExpectedCmdFifoWrites > 1u)  in Spi_Ip_DmaFastConfig()
1961                                             State->ExpectedCmdFifoWrites - 1u,   in Spi_Ip_DmaFastConfig()
1979                                         State->ExpectedCmdFifoWrites,   in Spi_Ip_DmaFastConfig()
1984         State->ExpectedCmdFifoWrites = 0u;  in Spi_Ip_DmaFastConfig()