Lines Matching refs:chnlPairNumber

934                               ftm_chnl_t chnlPairNumber,  in FTM_SetupDualEdgeCapture()  argument
944 …= ~(1UL << (FTM_COMBINE_COMBINE0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * (uint32_t)chnlPairNumber)));  in FTM_SetupDualEdgeCapture()
946 …|= (1UL << (FTM_COMBINE_DECAPEN0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * (uint32_t)chnlPairNumber)));  in FTM_SetupDualEdgeCapture()
947 …g |= (1UL << (FTM_COMBINE_DECAP0_SHIFT + (FTM_COMBINE_COMBINE1_SHIFT * (uint32_t)chnlPairNumber)));  in FTM_SetupDualEdgeCapture()
951     reg = base->CONTROLS[((uint32_t)chnlPairNumber) * 2U].CnSC;  in FTM_SetupDualEdgeCapture()
954     base->CONTROLS[((uint32_t)chnlPairNumber) * 2U].CnSC = reg;  in FTM_SetupDualEdgeCapture()
956     reg = base->CONTROLS[(((uint32_t)chnlPairNumber) * 2U) + 1U].CnSC;  in FTM_SetupDualEdgeCapture()
959     base->CONTROLS[(((uint32_t)chnlPairNumber) * 2U) + 1U].CnSC = reg;  in FTM_SetupDualEdgeCapture()
962     if (chnlPairNumber < kFTM_Chnl_4)  in FTM_SetupDualEdgeCapture()
965 …g &= ~((uint32_t)FTM_FILTER_CH0FVAL_MASK << (FTM_FILTER_CH1FVAL_SHIFT * (uint32_t)chnlPairNumber));  in FTM_SetupDualEdgeCapture()
966         reg |= (filterValue << (FTM_FILTER_CH1FVAL_SHIFT * (uint32_t)chnlPairNumber));  in FTM_SetupDualEdgeCapture()
972     FTM_SetPwmOutputEnable(base, chnlPairNumber, false);  in FTM_SetupDualEdgeCapture()