97                                 const clock_pll_ss_config_t *ss);
187 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss)  in CLOCK_CalcPllSpreadSpectrum()  argument
189     assert(ss != NULL);  in CLOCK_CalcPllSpreadSpectrum()
191     ss->stop = (uint16_t)(factor * range / XTAL_FREQ);  in CLOCK_CalcPllSpreadSpectrum()
192     ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ);  in CLOCK_CalcPllSpreadSpectrum()
204 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) |  in CLOCK_InitSysPll2()
205               ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS))  in CLOCK_InitSysPll2()
237     if ((config != NULL) && (config->ssEnable) && (config->ss != NULL))  in CLOCK_InitSysPll2()
240 …YS_PLL2_SS  = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) |  in CLOCK_InitSysPll2()
241                                    ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step));  in CLOCK_InitSysPll2()
591 …tf, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss)  in ANATOP_PllConfigure()  argument
597     if (ss != NULL)  in ANATOP_PllConfigure()
600 …              AUDIO_PLL_SPREAD_SPECTRUM_STEP(ss->step) | AUDIO_PLL_SPREAD_SPECTRUM_STOP(ss->stop) |  in ANATOP_PllConfigure()
648             clock_pll_ss_config_t ss = {0};  in CLOCK_InitAudioPllWithFreq()  local
649             CLOCK_CalcPllSpreadSpectrum(config.denominator, ssRange, ssMod, &ss);  in CLOCK_InitAudioPllWithFreq()
650             config.ss = &ss;  in CLOCK_InitAudioPllWithFreq()
688                         (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL);  in CLOCK_InitAudioPll()
726     if ((config->ss != NULL) && config->ssEnable)  in CLOCK_GPC_SetAudioPllOutputFreq()
728         ANADIG_PLL->PLL_AUDIO_SS = ANADIG_PLL_PLL_AUDIO_SS_STEP(config->ss->step) |  in CLOCK_GPC_SetAudioPllOutputFreq()
729 …              ANADIG_PLL_PLL_AUDIO_SS_STOP(config->ss->stop) | ANADIG_PLL_PLL_AUDIO_SS_ENABLE_MASK;  in CLOCK_GPC_SetAudioPllOutputFreq()
897             clock_pll_ss_config_t ss = {0};  in CLOCK_InitVideoPllWithFreq()  local
898             CLOCK_CalcPllSpreadSpectrum(config.denominator, ssRange, ssMod, &ss);  in CLOCK_InitVideoPllWithFreq()
899             config.ss = &ss;  in CLOCK_InitVideoPllWithFreq()
937                         (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL);  in CLOCK_InitVideoPll()
976     if ((config->ss != NULL) && config->ssEnable)  in CLOCK_GPC_SetVideoPllOutputFreq()
978         ANADIG_PLL->PLL_VIDEO_SS = ANADIG_PLL_PLL_VIDEO_SS_STEP(config->ss->step) |  in CLOCK_GPC_SetVideoPllOutputFreq()
979 …              ANADIG_PLL_PLL_VIDEO_SS_STOP(config->ss->stop) | ANADIG_PLL_PLL_VIDEO_SS_ENABLE_MASK;  in CLOCK_GPC_SetVideoPllOutputFreq()
1062                         (config->ssEnable && (config->ss != NULL)) ? config->ss : NULL);  in CLOCK_InitSysPll1()
1103     if ((config->ss != NULL) && config->ssEnable)  in CLOCK_GPC_SetSysPll1OutputFreq()
1105         ANADIG_PLL->SYS_PLL1_SS = ANADIG_PLL_SYS_PLL1_SS_STEP(config->ss->step) |  in CLOCK_GPC_SetSysPll1OutputFreq()
1106 …                ANADIG_PLL_SYS_PLL1_SS_STOP(config->ss->stop) | ANADIG_PLL_SYS_PLL1_SS_ENABLE_MASK;  in CLOCK_GPC_SetSysPll1OutputFreq()