Lines Matching refs:PLL0SSCG1
992 if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL) /* normal mode */ in pllFindSel()
1119 if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL) in findPll0MMult()
1122 …(float)(uint32_t)((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_MDIV_EXT_MASK) >> SYSCON_PLL0SSCG1_MDIV_EX… in findPll0MMult()
1126 mMult_int = ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_MD_MBS_MASK) << 7U); in findPll0MMult()
1559 Setup.pllsscg[1] = SYSCON->PLL0SSCG1; in CLOCK_GetPLL0OutClockRate()
1664 SYSCON->PLL0SSCG1 = pSetup->pllsscg[1]; in CLOCK_SetupPLL0Prec()
1665 SYSCON->PLL0SSCG1 = in CLOCK_SetupPLL0Prec()
1673 if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL) /* normal mode */ in CLOCK_SetupPLL0Prec()
1745 SYSCON->PLL0SSCG1 = pSetup->pllsscg[1]; in CLOCK_SetPLL0Freq()
1746 SYSCON->PLL0SSCG1 = in CLOCK_SetPLL0Freq()
1754 if ((SYSCON->PLL0SSCG1 & SYSCON_PLL0SSCG1_SEL_EXT_MASK) != 0UL) /* normal mode */ in CLOCK_SetPLL0Freq()
1921 SYSCON->PLL0SSCG1 = in CLOCK_SetupPLL0Mult()